An algebraic model for asynchronous circuits verification (original) (raw)

1988, IEEE Transactions on Computers

We present an algebraic methodology allowing us to compare switch-level circuits with higher level specifications. Switch-level networks, "user" behaviors, and input constraints are modeled as asynchronous machines. The model is based on the algebraic theory of characteristic functions (CF). An asynchronous automaton is represented by a pair of CF's, called dynamic CF (DCF): the first CF describes the potential stable states, and the second CF describes the possible transitions. The set of DCF's is a Boolean algebra. Machine composition and internal variables abstraction correspond, respectively, to the product and sum operations of the algebra. Internal variables can be abstracted under the presence of a domain constraint. The constraint is validated by comparison to the outside behavior. The model is well suited for speed-independent circuits for which the specification is given as a collection of properties. Verification reduces to the validation of Boolean inequalities. Index Terms-Abstraction of variables, asynchronous latch, characteristic functions, FIFO queue element, formal verification 3 speed-independent circuit. I. INTRODUCTION ORMAL verification techniques for hardware design are F being developed as an alternative to simulation. Whereas simulation compares results, proofs of correctness involve comparison of functional descriptions. The advantage of formal verification over simulation is that it is a complete method; however, its cost is high computational complexity. Verification must proceed hierarchically, at each level reducing the description complexity by means of abstraction. Numerous theoretical models have been proposed: algebraic methods [27], [16], axiomatic models [23], [25], denotational models using recursive expressions [ 121, [20], predicate logic [I], 1281, [29], and various forms of temporal logic [3], [ll], [211, 1221. The main problem of formal verification are: 1) how to obtain a functional description from the circuit structure, and 2) how to express the high-level specification suitable for comparison. The first problem requires the definition of a formal model, including the specification of primitive elements (axioms), and composition and abstraction laws. Formal verification meth-Manuscript