Simulation and Analysis of Reduced Switch Multilevel Inverters for High Power Applications (original) (raw)
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Numerous industrial applications have begun to require higher power apparatus in recent years. Some medium voltage motor drives and utility applications require medium voltage and MW power level. For a medium voltage grid, it is troublesome to connect one power semiconductor switch directly. The application of ac variable frequency speed regulations are widely popularized , high power and medium voltage inverter has recently become a research focus so far as known there are many problems in conventional two level inverter in the high power application. Multilevel inverter have been gained more attention for high power application in recent years which can operate at high switching frequencies while producing lower order harmonic components[1]-[6],A multilevel inverter not only achieves high power ratings, but also enables the use of renewable energy sources. Renewable energy sources such as photovoltaic, wind, and fuel cells can be easily interfaced to a multilevel inverter system for a high power application . There are several topologies such as neutral point clamped inverter, flying capacitor based multilevel, cascaded H-bridge multilevel inverter, hybrid H-bridge multilevel inverter and new hybrid H-bridge multilevel inverter [7]-[9]. This paper discusses the operation of different topologies for multilevel inverter which can produce multilevel; under this condition neutral point clamped multilevel inverter is presented, which has a simple structure and good performance .This topology effectively reduce the higher input dc voltage that each device must withstand. The main disadvantage still exists in this topology, which restricts the use of it to the high power range of operation [10]- . The first topology introduced is the series H-bridge design, from this several configurations have been obtained. This topology consists of series power conversion cells which form the cascaded H-bridge multilevel inverter and power levels may be scaled easily. An apparent disadvantage of this topology is the large number of isolated voltage required to supply each cell. By using H-bridge power conversion cells several topologies are developed and their advantages and disadvantages are discussed. The proposed topology for ABSTRACT In this paper, a study of multilevel inverter is presented and a new reduced switch count technique is introduced to construct a multilevel inverter topology which reduces the number of switches used in the system. In conventional H-bridge multilevel inverter to produce a seven level twelve number of switches are used. Due to involvement of high number of switches thereby the harmonics, switching losses, cost and the total harmonics distortion is increased. This proposed topology involves only eight number of switches. It dramatically reduces the switches for high number of levels that reduces the switching losses; cost and low order harmonics and thus effectively decreases total harmonics distortion.
International Journal of Engineering Research and Technology (IJERT), 2014
https://www.ijert.org/an-advanced-multilevel-inverter-with-reduced-switches-using-series-connection-of-sub-multilevel-inverters https://www.ijert.org/research/an-advanced-multilevel-inverter-with-reduced-switches-using-series-connection-of-sub-multilevel-inverters-IJERTV3IS070543.pdf This paper presents an improved multilevel inverter with reduced switches using series connection of sub multilevel inverters. It is popularly adapted for high power applications and is partly because of high quality output waveform of multilevel inverter when compared to two level inverters. In this paper a new topology for sub multilevel inverters is proposed as an improved or advanced multilevel inverter. The proposed multilevel inverter uses reduced number of switching devices. Special care is needed to obtain optimal structure regarding criteria such as number of switches, standing voltage on the switches, number of DC voltage sources and etc. The proposed multilevel inverter is simulated for a symmetric thirteen level inverter, asymmetric thirty one level inverter using MATLAB software. The main attention behind the objective of proposed asymmetric thirty one level inverter topology is to achieve the high power quality, low total harmonic distortion, less electromagnetic interference and better power factor. Keywords-Multilevel inverter, sub multilevel inverter, optimal structure, cascaded H-bridge inverter (CHB).
Design and Implementation of Seventeen Level Inverter With Reduced Components
IEEE Access, 2021
The multilevel inverters (MLI) are resourceful in producing a voltage waveform with superior-quality staircase counterfeit sinusoidal and depressed harmonic distortion (THD). Several conventional topologies are proposed to realize the MLI however, the limitations of these topologies may involve more DC sources and power-switching devices, and less THD, which in turn, increases the cost and size of the inverter. These drawbacks can be eliminated with the proposed hybrid Cascaded H-Bridge Multilevel Inverter with reduced components topology. As compared with the established MLI topologies the recommended topology having a reduced number of DC sources, power-switching devices, component count level factor, lesser TSV, more efficient, lesser THD, and cost-effective. The proposed MLI is a blend of a single-phase T-Type inverter and an H-Bridge module made of sub switches. This article incorporates the design and simulation of the multilevel inverter with staircase PWM technique. Further, the 9-level and 17-level MLI is examined with different combinational loads. The proposed inverter is stable during nonlinear loads, and it is well suited for FACTS and renewable energy grid-connected applications. An operational guideline has been explained with correct figures and tables. The Output voltage wave is realized in numerical simulation. Finally, the experimental demonstrations were performed by implementing a hardware prototype setup for both linear and nonlinear loads using the dSPACE controller laboratory. INDEX TERMS Hybrid cascaded H-bridge multilevel inverter with reduced components, pulse width modulation (PWM), total harmonics distortion (THD).
Multiple switching pattern for a modified reduce switch multilevel inverter: A comparison analysis
Journal of Physics: Conference Series, 2020
A primary concern of multilevel inverter is its capability to produce desired alternating voltage close to sinusoidal at the output, using multiple sources of DC voltage input. Mostly a multilevel inverter is used to generate the AC voltage from DC voltage. The aim of this paper is to investigate the output of 9 level multilevel inverter by modifying the conventional 5 levels H-bridge cascade multilevel inverter. The proposed design intending to reduce the number of switches from 16 switches to 10 switches. Implementation of different switching pattern methods; equal phase (EP), half equal phase (HEP), half height (HH) and feed forward (FF) and the related expression are presented in this paper. In the result section shows a different percentage of total harmonic distortion achieved. Out of all 4 methods, HH method suppressed distortion wave the most and resulted in the lowest THD in the proposed inverter. This paper shows that by reducing the number of switches in multilevel invert...
A New Configurable Topology for Multilevel Inverter With Reduced Switching Components
IEEE Access, 2020
Multilevel inverters (MLI) are now becoming an important element for medium-voltage highpower applications. A low switch count MLIs are more popular due to their high efficiency, low cost, and easy control for the output having a higher number of levels. A new MLI topology for single-phase applications based on switched dc voltage source with reduced switch count is proposed in the paper. The presented topology is developed with the constraints of lesser blocking voltage of the switches with a higher number of levels at the output using a lower number of components. The proposed topology can also work in the symmetrical and asymmetrical configuration. Selective harmonic elimination (SHE) technique is applied to synthesize the staircase output voltages with eliminations of lower order harmonics by optimized computation of angles for switching operation. The comparative studies with the MLIs recommended in recent times show the importance of the proposed MLI structure in terms of reduced switch count and lower voltage stresses across switches in both asymmetrical and symmetrical configurations. The experimental results are presented to confirm the performance of the proposed topology. INDEX TERMS Multilevel inverter, reduced semiconductor devices, symmetrical sources, asymmetrical sources, selective harmonics elimination, total standing voltage.
A comprehensive analysis of reduced switch count multilevel inverter
Australian Journal of Electrical and Electronics Engineering, 2019
Multilevel inverters (MLIs) have been recognised to generate the voltage for power quality applications. Presently number of topological improvements have been reported in literature. In higher level stages, it requires increased number of semiconductor devices that make the topology more complex, increases the cost and reduced the reliability of system. Paper discusses the method to reduce the number of switches for increased level of MLIs. It is evident from literature that RSC-MLIs, reduces the requirement of gate circuits, reduction in size and improves the power quality. It has multiple configurations based on topology and control structures. In this study, RSC-MLI configurations have been analysed. Modified selective harmonic elimination technique has been presented to control the magnitude of input DC-link and optimal switching angles.
A Novel Multilevel Inverter with Reduced DC Sources
IJIREEICE, 2015
Multilevel inverters have become more popular in high power and high voltage application. They have a unique structure which makes it possible to reach high voltages with less harmonic content. Harmonic content of the output voltage waveform decreases as the number of output voltage level increases. The main advantages are lower Total Harmonic Distortion (THD), less stress on the power switches and higher efficiency. However, increase in the device count due to increased voltage levels makes the control method complex and hence expensive. This paper presents a nine level inverter with reduced DC sources which is capable of obtaining all additive and subtractive combinations of input DC levels. This topology requires less power switches compared to conventional multilevel inverter and less gate drives. The proposed topology is presented through a nine-level inverter with an appropriate modulation scheme and detailed simulation has been carried out in MATLAB/Simulink. A comparison is made between proposed topology and the conventional multilevel topology on the basis of device count, number of levels in the output voltage and THD.
International Journal of Power Electronics and Drive Systems, 2023
Multilevel inverters have the benefit of producing high output voltage values with little distortion. This paper deals with decreasing total harmonic distortion (THD) and providing an output voltage with various step levels switching devices. In this study, a 27-level inverter with three asymmetric H-Bridge was designed and simulated based on level shift sinusoidal pulsewidth modulation and phase shift sinusoidal pulse-width modulation methods. MATLAB/Simulink has been used to create this model and test it at different types of loads. The results showed that a multilevel inverter with (PS-PWM) produces less (THD) than a multilevel with (LS-PWM), when the resistive load was used, the produced voltage and current THD in (PSPWM) and (LS-PWM) are 3.02% and 4.30% respectively, that has resulted from the linearity between voltage and current in the resistive load. While in the case of applying an inductive load, the THD in the voltage is constant in both (PS-PWM) and (LS-PWM) methods and has the same values as the THD in a resistive load. However, the THD in the current with inductive load decreased to 2.79% in (PS-PWM) and 4.04% in (LS-PWM). Finally, these results show that the performance of the proposed power circuit with PS-PWM is better than (LS-PWM)
International Journal of Power Electronics and Drive Systems (IJPEDS), 2021
Currently, multilevel inverter (MLI) has been chosen over conventional inverter because of less harmonic distortions and higher output voltage levels. In this paper, 15-level inverter with reduced number of power switching devices is designed. Different output voltage levels can be obtained including zero-level or with none zero-level (NoneZero-level). Single-phase MLI inverter with 7-switches is built, simulated, and implemented practically. The system depending on modified absolute sinusoidal pulse width modulation (MASPWM) controller strategy is adopted. Simulation results clarified that MLI with NoneZero-level provides output voltage with total harmonic distortion (THD) percent less than with zero-level. The THD of the 15-level output voltage with zero-level is 3.39%, while with NoneZero-level is 3%, respectively. The system is tested at different output levels. The THD values at different output voltage levels is reduced by 12% depending on NoneZero-level state. Depending on what has been achieved, the system has been implemented practically with NoneZerolevel and the THD value was 3.1%. These results prove the success of the suggested MLI circuit and MASPWM controller to obtain the required voltage level and THD.
A Comparative study of Multilevel Inverter Typologies with Reduced switches
IEEE, 2019
From the past couple of decades, Multilevel inverter (MLI) technologies are suitable for high power industrial applications. Multilevel inverter (MLI) synthesizes several DC sources. Multilevel inverter (MLI) are the most suitable technology for conversion in renewable sources. This paper presents a new Multilevel inverter topology and a comparative study of Multilevel inverter (MLI) topologies in terms of number of switches, hormonic content and efficiency. These topologies are cost effective as compare to conventional Multilevel inverters (MLI). Despite of many advantages, multilevel inverter (MLI) with reduced switches basis some advantages like the voltage stress on the individual switches increases. For that, it is recommended to use switches of high rated values. All the topologies are modelled using Matlab/Simulink and the results are validated and compared.