Low-frequency noise analysis of heterojunction SELBOX TFET (original) (raw)
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Noise behaviour of δp+ Si1−xGex layer SELBOX TFET
Indian Journal of Physics, 2019
This paper explores an analysis of low-and high-frequency noise in a heterojunction, selective buried oxide (SELBOX) with high-k gate dielectric TFET. The electrical parameters for different doping concentrations, dp ? layer width and mole fractions have been investigated. The proposed structure has been optimized for different positions of small gap on SELBOX substrate. It has been observed that the presence of small gap on SELBOX near the source region provides the lowest OFF current. The variation of noise (flicker ? diffusion ? generation-recombination) with frequency has been analysed. Further, the effect of various noise components on the device performance considering the current noise spectral density (S ID) and voltage noise spectral density (S VG) is investigated. The impact of germanium mole fractions on noise components has been examined in terms of normalized current noise power spectral density and subthreshold swing.
2008
In this paper, we report the dc and noise properties of the gate current in epitaxial Ge p-channel metal oxide field effect transistors ͑pMOSFETs͒ with a Si passivated surface. The gate stack consists of HfO 2 / SiO 2 dielectric with TiN / TaN metal gate. The observed temperature dependence of the gate current indicates that the dominant charge transport mechanism through the gate dielectric consists of Poole-Frenkel conduction. Gate current 1 / f noise is more than two orders higher in the case of Ge pMOSFETs when compared to reference Si pMOSFETs. Ge outdiffusion into the gate oxide is the suspected cause for the enhanced Poole-Frenkel conduction and the high gate current 1 / f noise in Ge pMOSFETs.
Low frequency noise in Si and Si/SiGe/Si PMOSFETs
Measurements of 1/f noise in Si and Si_0.64_Ge_0.36 PMOSFETs have been compared with theoretical models of carrier tunnelling into the oxide. Reduced noise is observed in the heterostructure device as compared to the Si control. We suggest that this is primarily associated with an energy dependent density of oxide trap states and a displacement of the Fermi level at the SiO2 interface in the heterostructure relative to Si. The present study also emphasizes the important role of transconductance enhancement in the dynamic threshold mode in lowering the input referred voltage noise.
Appl Phys Lett, 2008
In this paper, we report the dc and noise properties of the gate current in epitaxial Ge p-channel metal oxide field effect transistors (pMOSFETs) with a Si passivated surface. The gate stack consists of HfO2/SiO2 dielectric with TiN /TaN metal gate. The observed temperature dependence of the gate current indicates that the dominant charge transport mechanism through the gate dielectric consists of Poole-Frenkel conduction. Gate current 1/f noise is more than two orders higher in the case of Ge pMOSFETs when compared to reference Si pMOSFETs. Ge outdiffusion into the gate oxide is the suspected cause for the enhanced Poole-Frenkel conduction and the high gate current 1/f noise in Ge pMOSFETs.
Silicon, 2019
This paper proposes a novel TFET structure namely gate stacked (GS) heterojunction (HJ) partial-ground-plane (PGP) TFET with SELBOX (GSHJ-PGP-STFET) for improving the ON/OFF-state current ratio of the TFET by reducing the OFF-state current while maintaining the ON-state current nearly unaffected. Here we have done a comparative analysis of fully depleted SOI TFET and TFET on SELBOX structure with our proposed device. An extensive TCAD based simulation study has been carried out for investigating the effect of temperature on the subthreshold swing (SS), transfer characteristics, threshold voltage, and I ON /I OFF ratio of the given TFET structures. The I ON /I OFF ratio and SS are found to be~10 11 and 47 mV/dec respectively which is better over other two structures. Also, the proposed TFET device has improved reliability in terms of smaller effect of temperature on the performance of GSHJ-PGP-STFET as compared to the conventional SELBOX and FD-SOI TFET structures. Keywords Silicon on insulator (SOI). Selective buried oxide (SELBOX). Band-to-band tunneling (BTBT). Tunnel field effect transistor (TFET)
1/f noise in Si and si/sub 0.7/Ge/sub 0.3/ pMOSFETs
IEEE Transactions on Electron Devices, 2003
Strained layer Si 0 7 Ge 0 3 pMOSFETs were fabricated and shown to exhibit enhanced hole mobility, up to 35% higher for a SiGe device with 3-nm-thick Si-cap, and lower 1 noise compared to Si surface channel pMOSFETs. The 1 noise in the investigated devices was dominated by mobility fluctuation noise and found to be lower in the SiGe devices. The source of the mobility fluctuations was determined by investigating the electric field dependence of the 1 noise. It was found that the SiO 2 /Si interface roughness scattering plays an important role for the mobility fluctuation noise, although not dominating the effective mobility. The physical separation of the carriers from the SiO 2 /Si interface in the buried SiGe channel pMOSFETs resulted in lower SiO 2 /Si interface roughness scattering, which explains the reduction of 1 noise in these devices. The 1 noise mechanism was experimentally verified by studying 1 noise in SiGe devices with various thicknesses of the Si-cap. A too large Si-cap thickness led to a deteriorated carrier confinement in the SiGe channel resulting in that considerable 1 noise was generated in the parasitic current in the Si-cap. In our experiments, the SiGe devices with a Si-cap thickness in the middle of the interval 3-7 nm exhibited the lowest 1 noise.
Applied Physics Letters, 2008
In this paper, we report the dc and noise properties of the gate current in epitaxial Ge p-channel metal oxide field effect transistors ͑pMOSFETs͒ with a Si passivated surface. The gate stack consists of HfO 2 / SiO 2 dielectric with TiN / TaN metal gate. The observed temperature dependence of the gate current indicates that the dominant charge transport mechanism through the gate dielectric consists of Poole-Frenkel conduction. Gate current 1 / f noise is more than two orders higher in the case of Ge pMOSFETs when compared to reference Si pMOSFETs. Ge outdiffusion into the gate oxide is the suspected cause for the enhanced Poole-Frenkel conduction and the high gate current 1 / f noise in Ge pMOSFETs.
The impact of donor/acceptor types of interface traps on selective buried oxide TFET characteristics
Applied Physics A, 2020
This paper investigates the reliability of the selective buried oxide TFET δp + silicon-germanium layer at the tunneling junction. The impact of various uniform and Gaussian trap distributions and energies on the band-to-band tunneling current has been examined. The device has been optimized for different gap positions in the buried oxide. The OFF current of the proposed device is 1.7 × 10 −18 A/µm. It has been observed that the effect of Gaussian trap is more compared to that of uniform trap. The study quantifies the DC parameters such as I ON /I OFF ratio, subthreshold swing against different types of interface traps (donor or acceptor), density (Dit), position (near the tunneling junction or oxide/channel interface) and trap energy level (E trap). Drain current reduces in the presence of acceptor-type trap and the variation is more for large trap density (1 × 10 14 cm −3). An opposite behavior is perceived in the presence of donor-type traps. The device with highest acceptor trap concentration (1 × 10 14 cm −3) provides minimum ON current of 2.21 × 10 −6 A/µm whereas in case of donor trap concentration (1 × 10 14 cm −3), highest ON current of 2.93 × 10 −5 A/µm is obtained. The device with no traps proves to be better by providing maximum I ON /I OFF ratio of 3.89 × 10 12 with SS of 45 mV/dec. Further, the affectability of quantum correction on various electrical parameters has been studied for different types of traps.
Japanese Journal of Applied Physics, 2012
Experiments were carried out for the n-channel devices, processed in a 0.3 m spacer less complementary metal-oxide-semiconductor technology. Random-telegraph-signal measurements were performed for the constant gate voltage. It is supposed that electron concentration in the channel decreases from the source to the drain contact. Lateral component of the electric field is inhomogeneous in the channel and it has a minimum value near the source and reaching the maximum value near the drain electrode. Drain current is given by two components-diffusion and drift ones. Diffusion current component is independent on the x-coordinate and it is equal to the drift current component for the low electric field. The model explaining the experimentally observed capture time constant dependence on the lateral electric field and the trap position is given. From the dependence of the capture time constant c on the drain current could be calculated longitudinal coordinate of the trap position.
Low-Frequency Noise Assessment of Different Ge pFinFET STI Processes
IEEE Transactions on Electron Devices, 2016
An experimental low-frequency noise (LFN) assessment of long channel Ge pFinFET devices fabricated in different shallow trench isolation (STI) processes is presented, taking into consideration devices with fin widths from 100 nm (planar-like) down to 20 nm. In addition, the correlation among LFN parameters, hole mobility and threshold voltage, is also evaluated. The carrier number fluctuation (N) model is confirmed as dominant mechanism for all studied Ge pFinFETs and there is no correlation with the used STI process. From the LFN, it is evidenced that the Coulomb scattering mobility mechanism plays an important role for STI-first process, resulting in a mobility degradation.