Systemic Embedded Software Generation from SystemC (original) (raw)

Systematic embedded software generation from SystemC

2003 Design, Automation and Test in Europe Conference and Exhibition, 2003

The embedded software design cost represents an important percentage of the embedded-system development costs . This paper presents a method for systematic embedded software generation that reduces the software generation cost in a platform-based HW/SW codesign methodology for embedded systems based on SystemC. The goal is that the same SystemC code allows system-level specification and verification, and, after SW/HW partition, SW/HW co-simulation and embedded software generation. The C++ code for the SW partition (processes and process communication including HW/SW interfaces) is systematically generated including the userselected embedded OS (e.g.: the eCos open source OS).

Embedded Software Generation from SystemC for Platform Based Design

The current trend in embedded system design is towards an increasing percentage of the embedded SW development cost of the total embedded system design costs. There is a clear need of reducing SW generation cost while maintaining reliability and design quality. SystemC represents a step forward in ensuring these goals. In this chapter, the application of SystemC to embedded SW generation is discussed. The state of art of the existing techniques for SW generation is analyzed and their advantages and drawbacks presented. In addition, methods for systematic embedded software generation which reduce the software generation cost in a platform based HW/SW co-design methodology for embedded systems based on SystemC is presented. SystemC supports a single-source approach, that is, the use of the same code for system level specification and verification, and, after HW/SW partitioning, for HW/SW co-simulation and embedded SW generation.

Single Source Design Environment for Embedded Systems Based on SystemC

Design Automation for Embedded Systems, 2004

There is a clear need for new methodologies supporting efficient design of embedded systems on complex platforms implementing both hardware and software modules. Software development has to be carried out under a closer relationship with the underlying platform. The current trend is towards an increasing embedded software development effort under more stringent time-to-market requirements. As a consequence, it is necessary to reduce software generation cost while maintaining reliability and design quality. In that context, languages centered on describing whole systems, with software and hardware parts, have been proposed. Among these, SystemC is gaining increasing interest as a specification language for embedded systems. SystemC supports the specification of the complete system and the modeling of the platform. In this paper, the application of SystemC to performance analysis and embedded software generation is discussed. A single-source approach is proposed, that is, the use of the same code for system-level specification and profiling, and, after architectural mapping, for HW/SW co-simulation and embedded software generation. A design environment based on C++ libraries for performance analysis and software generation is presented. This approach avoids working on intermediate formats and translators, which facilitates the designer’s interaction with the system description throughout the development process. Additionally, it ensures the preservation of the computational models used for the system specification during architectural mapping and compilation.

System-level development of embedded software

2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 2010

Embedded software plays an increasingly important role in implementing modern embedded systems. Development of embedded software, and of Hardware-dependent Software in particular, is challenging due to the tight integration with the underlying hardware architecture. In this paper, we describe our system-level design approach that allows designers to develop software in form of a platformagnostic specification. Our design environment enables exploration of different architectural alternatives and subsequently generates the software implementation. It generates the application code, communication drivers, and an adaptation to a chosen RTOS. It completes the process by producing the final target binary for each processor. Our experimental results demonstrate the automatic generation of the binaries for five control and media oriented applications.

Embedded software generation from system level design languages

ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753), 2004

To meet the challenge of increasing design complexity, designers are turning to system level design languages (SLDLs) to model systems at a higher level of abstraction. This paper presents a method of automatically generating embedded software from system specification written in SLDL. Several refinement steps and intermediate models are introduced in our software generation flow. We demonstrate the effectiveness of the proposed method by a tool which can generate efficient ANSI C code from system models written in SLDL.

Embedded Software Development in a System-Level Design Flow

IFIP – The International Federation for Information Processing, 2007

System level design is considered a major approach to tackle the complexity of modern System-on-Chip designs. Embedded software within SoCs is gaining importance as it addresses the increasing need for flexible and feature-rich solutions. Therefore, integrating software design and co-simulation into a system level design flow is highly desirable. In this article, we present the software perspective within our systemlevel design flow. We address three major aspects: (1) modeling of a processor (from abstract to ISS-based), (2) porting of an RTOS, and (3) the embedded software generation including RTOS targeting. We describe these aspects based on a case study for the ARM7TDMI processor. We show processor models including a cycle-accurate ISSbased model (using SWARM), which executes the RTOS MicroC/OS-II. We demonstrate our flow with an automotive application of anti-lock breaks using one ECU and CAN-connected sensors. Our experimental results show that automatic SW generation is achievable and that SW designers can utilize the system level benefits. This allows the designer to develop applications more efficiently at the abstract system level.

DESC: A hardware-software codesign methodology for distributed embedded systems

2001

The hardware-software codesign of distributed embedded systems is a more challenging task, because each phase of codesign, such as copartitioning, cosynthesis, cosimulation, and coverification must consider the physical restrictions imposed by the distributed characteristics of such systems. Distributed systems often contain several similar parts for which design reuse techniques can be applied. Object-oriented (OO) codesign approach, which allows physical restriction and object design reuse, is adopted in our newly proposed Distributed Embedded System Codesign (DESC) methodology. DESC methodology uses three types of models: Object Modeling Technique (OMT) models for system description and input, Linear Hybrid Automata (LHA) models for internal modeling and verification, and SES/workbench simulation models for performance evaluation. A two-level partitioning algorithm is proposed specifically for distributed systems. Software is synthesized by task scheduling and hardware is synthesized by system-level and object-oriented techniques. Design alternatives for synthesized hardware-software systems are then checked for design feasibility through rapid prototyping using hardware-software emulators. Through a case study on a Vehicle Parking Management System (VPMS), we depict each design phase of the DESC methodology to show benefits of OO codesign and the necessity of a two-level partitioning algorithm.

Communication synthesis and HW/SW integration for embedded system design

1998

The implementation of codesign applications generally requiresthe use of heterogeneous resources (e.g., processor cores, hardware accelerators) in one system. Inteifacing hardware and software components together and providing communications between them are particularly error proned and time consuming tasks. Hence, on the basisof a generic architecturewe propose an extended communicationsynthesis method that provides characterization of communications and their implementation schemein the target architecture. This method takes place after partitioning and scheduling and can constitute the basis of a back end of a codesign framework leading to HW/SWintegration.

Embedded software generation from system level specification for multi-tasking embedded systems

Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005., 2005

In this paper we present a new design flow in which embedded software code is generated from system level specification of multi-tasking embedded system, both for simulation and implementation. The generated software has a layered structure using virtual OS APIs and OS wrapper implementations to make it reconfigurable for multiple target platforms. Implementation of the OS wrapper is explained in details. With a Divx play example, we show some experimental results about the real-time performance comparison between two different platforms 145 2B-2