Architectural Runtime Verification (original) (raw)

Verification of Temporal Properties in Automotive Embedded Software

2008 Design, Automation and Test in Europe, 2008

The amount of software in embedded systems has increased significantly over the last years and, therefore, the verification of embedded software is of fundamental importance. One of the main problems in embedded software is to verify variables and functions based on temporal properties. Formal property verification using model checker often suffers from the state space explosion problem when a large software design is considered. In this paper, we propose two new approaches to integrate assertions in the verification of embedded software using simulation-based verification. Firstly, we extended a SystemC hardware temporal checker with interfaces in order to monitor the embedded software variables and functions that are stored in a microprocessor memory model. Secondly, we derived a SystemC model from the original C program in order to integrate directly with the Sys-temC temporal checker. We performed a case study on an embedded software from automotive industry which is responsible for controlling read and write requests to a non-volatile memory.

Runtime verification: the application perspective

2012

In the past decade, runtime verification (RV) has gained much focus, from both the research community and practitioners. RV combines a set of theories, techniques and tools aiming towards efficient analysis of systems' executions and guaranteeing their correctness using monitoring techniques. Major challenges in RV include characterizing and formally expressing requirements that can be monitored, offering intuitive and concise specification formalisms, and monitoring specifications efficiently for functional and nonfunctional behavior. Despite the major strides made in recent years, much effort is still needed to make RV an attractive and viable methodology for industrial use and to apply it to wider application domains, such as security, bio-health, power micro-grids. This special issue of STTT proposes extended versions of four papers that have been selected from the runtime verification track at ISoLA 2012 (Margaria and Steffen, Proceedings of the 5th international symposium on leveraging applications of formal methods, verification and validation, 2012).

Semiformal verification of temporal properties in automotive hardware dependent software

2009 Design, Automation & Test in Europe Conference & Exhibition, 2009

The verification of embedded software has become an important subject over the last years. This work presents a new semiformal verification approach called SofTPaDS. It combines assertionbased and symbolic simulation approaches for the verification of embedded software with hardware dependencies. SofTPaDS shows to be more efficient than the software model checkers in order to trace deep state spaces and improves the state coverage relative to a simulation-based verification tool. We have successfully applied our approach to an industrial automotive embedded software. * CNPq scholarship holder, Brazil.

A survey of challenges for runtime verification from advanced application domains (beyond software)

Formal Methods in System Design

Runtime verification is an area of formal methods that studies the dynamic analysis of execution traces against formal specifications. Typically, the two main activities in runtime verification efforts are the process of creating monitors from specifications, and the algorithms for the evaluation of traces against the generated monitors. Other activities involve the instrumentation of the system to generate the trace and the communication between the system under analysis and the monitor. Most of the applications in runtime verification have been focused on the dynamic analysis of software, even though there are many more potential applications to other computational devices and target systems. In this paper we present a collection of challenges for runtime verification extracted from concrete application domains, focusing on the difficulties that must be overcome to tackle these specific challenges. The computational models that characterize these domains require to devise new tech...

Architectural Verification of Black-Box Component-Based Systems

Lecture Notes in Computer Science, 2007

We introduce an original approach, which combines monitoring and model checking techniques into a comprehensive methodology for the architectural verification of Component-based systems. The approach works by first capturing the traces of execution via the instrumented middleware; then, the observed traces are reverse engineered into Message Sequence Charts, which are then checked for compliance to the Component-based Software Architecture, using a model checker. The methodology has been conceived for being applied indifferently for validating the system in house before deployment and for continuous validation in the field following evolution. A case study for the first case is here illustrated.

Runtime Contracts Checker: Increasing Robustness of Component-Based Software Systems

IOP Conference Series: Materials Science and Engineering

Software Systems are becoming increasingly complex leading to new Validation &Verification challenges. Model checking and testing techniques are used at development time while runtime verification aims to verify that a system satisfies a given property at runtime. This second technique complements the first one. This paper presents a runtime contract checker (RCC) which checks a component-based software system’s contracts defined at design phase. We address embedded systems whose software components are designed by Unified Modelling Language-State Machines (UML-SM) and their internal information can be observable in terms of model elements at runtime. Our previous research work, CRESCO (C++ REflective State-Machines based observable software COmponents) framework, generates software components that provide this observability. The checker uses software components’ internal status information to check system level safety contracts. The checker detects when a system contract is violate...

Introduction to Runtime Verification

2010

The aim of this chapter is to act as a primer for those wanting to learn about Runtime Verification (RV). We start by providing an overview of the main specification languages used for RV. We then introduce the standard terminology necessary to describe the monitoring problem, covering the pragmatic issues of monitoring and instrumentation, and discussing extensively the monitorability problem.

A Tutorial on Runtime Verification

Abstract. This tutorial presents an overview of the field referred as to runtime verification. Runtime Verification is the study of algorithms, data structures, and tools focused on analyzing executions of systems. The performed analysis aims at improving the confidence in systems behavior, either by improving program understanding, or by checking conformance to specifications or algorithms. This chapter focuses specifically on checking execution traces against requirements formalized in terms of monitors.

Toward translating design constraints to run-time assertions

2005

Inconsistency between design descriptions and implementation might be reduced if constraints associated with entities (eg, OCL assertions in UML) were propagated to run-time assertions in corresponding parts of an implementation. We describe an approach in which constraints in a fixed design assertion language are propagated using translation rules that can be selected or customized for different implementation programming languages or assertion packages.

Detecting Architectural Erosion using Runtime Verification

Electronic Proceedings in Theoretical Computer Science

The architecture of a system captures important design decisions for the system. Over time, changes in a system's implementation may lead to violations of specific design decisions. This problem is common in the industry and known as architectural erosion. Since it may have severe consequences on the quality of a system, research has focused on the development of tools and techniques to address the presented problem. As of today, most of the approaches to detect architectural erosion employ static analysis techniques. While these techniques are well-suited for the analysis of static architectures, they reach their limit when it comes to dynamic architectures. Thus, in this paper, we propose an alternative approach based on runtime verification. To this end, we propose a systematic way to translate a formal specification of architectural constraints to monitors, which can be used to detect violations of these constraints. The approach is implemented in Eclipse/EMF, demonstrated through a running example, and evaluated using two case studies.