Thermal biasing at the nanoscale (original) (raw)
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Strategy for accurate thermal biasing at the nanoscale
Nanotechnology, 2020
We analyze the benefits and shortcomings of a thermal control in nanoscale electronic conductors by means of the contact heating scheme. Ideally, this straightforward approach allows one to apply a known thermal bias across nanostructures directly through metallic leads, avoiding conventional substrate intermediation. We show, by using the average noise thermometry and local noise sensing technique in InAs nanowire-based devices, that a nanoscale metallic constriction on a SiO 2 substrate acts like a diffusive conductor with negligible electronphonon relaxation and non-ideal leads. The non-universal impact of the leads on the achieved thermal bias-which depends on their dimensions, shape and material composition-is hard to minimize, but is possible to accurately calibrate in a properly designed nano-device. Our results allow to reduce the issue of the thermal bias calibration to the knowledge of the heater resistance and pave the way for accurate thermoelectric or similar measurements at the nanoscale.
Diameter dependence of the thermal conductivity of InAs nanowires
Nanotechnology, 2015
The diameter dependence of the thermal conductivity of InAs nanowires in the range of 40-1500 nm has been measured. We demonstrate a reduction in thermal conductivity of 80% for 40 nm nanowires, opening the way for further design strategies for nanoscaled thermoelectric materials. Furthermore, we investigate the effect of thermal contact in the most common measurement method for nanoscale thermal conductivity. Our study allows for the determination of the thermal contact using existing measurement setups. The thermal contact resistance is found to be comparable to the wire thermal resistance for wires with a diameter of 90 nm and higher.
Suspended InAs Nanowire-Based Devices for Thermal Conductivity Measurement Using the 3ω Method
Journal of Materials Engineering and Performance, 2018
We demonstrated device architectures implementing suspended InAs nanowires for thermal conductivity measurements. To this aim, we exploited a fabrication protocol involving the use of a sacrificial layer. The relatively large aspect ratio of our nanostructures combined with their low electrical resistance allows to exploit the four-probe 3x technique to measure the thermal conductivity, inducing electrical self-heating in the nanowire at frequency x and measuring the voltage drop across the nanostructure at frequency 3x. In our systems, field effect modulation of the transport properties can be achieved exploiting fabricated sidegate electrodes in combination with the SiO 2 /Si ++ substrate acting as a back gate. Our device architectures can open new routes to the all-electrical investigation of thermal parameters in III-V semiconductor nanowires, with a potential impact on thermoelectric applications.
Large thermal biasing of individual gated nanostructures
Nano Research, 2014
We demonstrate a novel nanoheating scheme that yields very large and uniform temperature gradients up to about 1 K every 100 nm, in an architecture which is compatible with the field-effect control of the nanostructure under test. The temperature gradients demonstrated largely exceed those typically obtainable with standard resistive heaters fabricated on top of the oxide layer. The nanoheating platform is demonstrated in the specific case of a short-nanowire device. PACS numbers: 72.20.Pa, 81.07.Gf, 85.30.Tv In the past decade much effort was directed to the investigation of the thermoelectric (TE) properties of innovative materials. Such a revival of TE science was largely driven by the interest in solid-state energy converters 1-4 and by the development of novel advanced materials 5 and, in particular, nanomaterials 6-8 . Indeed, the achievement of an efficient and cost-effective TE technology depends on the optimization of a set of interdependent material parameters of the active element: the Seebeck coefficient S and the heat and charge conductivities κ and σ. Recent developments in nanoscience yielded new strategies for the design of novel and more efficient nanomaterials in which the strong interdependency between S, κ and σ can be made less stringent 9-12 . Despite the host of available theoretical predictions 12-16 , however, the optimization of the TE behavior of nanostructured materials still remains an open and actively investigated problem 17,18 , in particular for what concerns the influence of electron quantum states engineering on the power factor σS 2 . This led to the development of a number of experimental arrangements designed to impose a controllable thermal bias over micrometric or even submicrometric active elements and to measure how this affects charge transport in the device. Differently from macroscopic active elements, nanoscale TE materials also allow the investigation of thermal effects in devices where fieldeffect can be used to control carrier density 18,19 or even quantum states energetics 20,21 and coupling 22 . While this may not be a directly scalable strategy in view of applications, it is particularly useful for what concerns the fundamental investigation of the impact of dopinga key parameter -on TE performance. Various examples of microheating systems were reported in the literature. These include (i) suspended SiN x microheaters, which enable a precise estimate of the κ of individual nanostructures, but also pose non-trivial technical challenges 23,24 and do not allow the field-effect control of the nanostructure behavior; (ii) resistive heaters fabricated on top of standard Si/SiO 2 substrates, which are instead typically used to estimate S and allow also the field-effect control of carrier density 19,22,25-28 .
Tunable thermal conductivity in defect engineered nanowires at low temperatures
Physical Review B, 2011
We measure the thermal conductivity (κ) of individual InAs nanowires (NWs), and find that it is 3 orders of magnitude smaller than the bulk value in the temperature range of 10 to 50 K. We argue that the low κ arises from the strong localization of phonons in the random superlattice of twindefects oriented perpendicular to the axis of the NW. We observe significant electronic contribution arising from the surface accumulation layer which gives rise to tunability of κ with the application of electrostatic gate and magnetic field. Our devices and measurements of κ at different carrier concentrations and magnetic field without introducing structural defects, offer a means to study new aspects of nanoscale thermal transport.
Enhanced thermoelectric figure of merit of individual Si nanowires with ultralow contact resistances
Nano Energy
Low-dimensional silicon-based materials have shown a great potential for thermoelectric applications due to their enhanced figure of merit ZT and high technology compatibility. However, their implementation in real devices remains highly challenging due to the associated large contact resistances (thermal and electrical). Herein we demonstrate ultralow contact resistance silicon nanowires epitaxially grown on scalable devices with enhanced ZT. Temperature dependent figure of merit was fully determined for monolithically integrated individual silicon nanowires achieving a maximum value of ZT = 0.2 at 620 K. Sidewise, this work accounts for the first time nearly zero thermal and electrical contact resistances in monolithically integrated bottom-up nanowires.
By employing three different measurement methods, we rigorously show that micron-scale ballistic thermal conduction can be found in Si-Ge heterogeneously interfaced nanowires exhibiting low thermal conductivities. The heterogeneous interfaces localize most high-frequency phonons and suppress the total thermal conductivity below that of Si or Ge. Remarkably, the suppressed thermal conductivity is accompanied with an elongation of phonon mean free paths over 5 µm at room temperature, which is not only more than 25 times longer than that of Si or Ge but also longer than those of the best thermal conductors like diamond or graphene. We estimate that only 0.1% of the excited phonons carry out the heat transfer process, and, unlike phonon transport in Si or Ge, the low-frequency phonons in Si-Ge core-shell nanowires are found to be insensitive to twin boundaries, defects, and local strain. The ballistic thermal conduction persisting over 5 µm, along with the suppressed thermal conductivity, will enable wave engineering of phonons at room temperature and inspire new improvements of thermoelectric devices.
Giant Thermovoltage in Single InAs Nanowire Field-Effect Transistors
Nano Letters, 2013
Millivolt range thermovoltage is demonstrated in single InAs-nanowire based field effect transistors. Thanks to a buried heating scheme, we drive both a large thermal bias ∆T > 10 K and a strong field-effect modulation of electric conductance on the nanostructures. This allows the precise mapping of the evolution of the Seebeck coefficient S as a function of the gate-controlled conductivity σ between room temperature and 100 K. Based on these experimental data a novel estimate of the electron mobility is given. This value is compared with the result of standard field-effect based mobility estimates and discussed in relation to the effect of charge traps in the devices. arXiv:1312.2835v1 [cond-mat.mes-hall]
Thermoelectric properties of InAs nanowires from full-band atomistic simulations
2020
In this work we theoretically explore the effect of dimensionality on the thermoelectric power factor of InAs nanowires by coupling atomistic tight-binding calculations to the Linearized Boltzmann transport formalism. We consider nanowires with diameters from 40nm (bulk-like) down to 3nm (1D), which allows for the proper exploration of the power factor within a unified large-scale atomistic description across a large diameter range. We find that as the diameter of the nanowires is reduced below d < 10 nm, the Seebeck coefficient increases substantially, a consequence of strong subband quantization. Under phonon-limited scattering conditions, a considerable improvement of ~6x in the power factor is observed around d = 10 nm. The introduction of surface roughness scattering in the calculation reduces this power factor improvement to ~2x. As the diameter is decreased down to d = 3 nm, the power factor is diminished. Our results show that, although low effective mass materials such a...