Screen-printed planar metallization for lab-on-CMOS with epoxy carrier (original) (raw)

2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016

Abstract

The integration of biosensors, microfluidics and CMOS instrumentation provides a compact lab-on-CMOS microsystem well suited for high throughput measurement. This paper describes a screen-printed planar metallization technique for lab-on-CMOS that overcomes challenges associated with traditional thin film metallization. Utilizing a chip-in-carrier packaging approach with an epoxy carrier, screen-printed electrical interconnects are shown to reliably resolve up to 10μm step height differences between the CMOS chip and the surrounding carrier that supports microfluidics. The metallization process presented in this paper is also shown to be compatible with subsequent microfluidic integration to complete the lab-on-CMOS device platform.

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