Relationship between photovoltaic and diode characteristic parameters in the Sn/p-Si Schottky type photovoltaics (original) (raw)
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Comparison of electrical parameters of Zn/p-Si and Sn/p-Si Schottky barrier diodes
Solid State Communications, 2005
In this study, current-voltage (I-V) and capacitance-voltage (C-V) characteristics of metal-semiconductor (MS) Zn/p-Si and Sn/p-Si Schottky diodes, with high resistivity silicon structures, are investigated. The parameters of series resistance (R S), the ideality factor (n) and the barrier height (F b) are determined by performing different plots from the forward bias current-voltage (I-V) and reverse bias capacitance-voltage (C-V) characteristics. Thus, the barrier heights (F b) for the Si Schottky diodes obtained between 0.725 and 1.051 eV, the ideality factor (n) between 1.043 and 1.309, and the series resistance (R S) between 12.594 and 12.950 kU. The energy distribution of interface states density was determined from the forward bias I-V characteristics by taking into account the bias dependence of the effective barrier height. It was concluded that the density of interface states in the considered energy range are in close agreement with each other values obtained for Zn/p-Si and Sn/p-Si Schottky diodes.
Electrical and photovoltaic properties of Cr/Si Schottky diodes
The electrical properties of the Cr/p-Si(111) and Cr/n-Si(100) junctions were investigated through capacitance-voltage and current-voltage measurements, performed under dark and light conditions at room temperature. Diode parameters of Cr/Si Schottky diode like ideality factor and barrier height were obtained and variations of them were monitored as a function of temperatures. Also, an attempt to explore the governing current flow mechanism was tried. The reverse biased I-V measurement under illumination exhibited anomalous behavior as well as high photosensitivity. The former was explained in terms of minority carrier injection phenomenon. The photovoltaic parameters, such as open circuit voltage and short circuit current were obtained as 370 mV and I sc ¼ 44.5 mA, respectively.
Energies, 2020
The accurate determination of the electrical properties of photovoltaic devices is of utmost importance to predict and optimize their overall optoelectronic performance. For example, the minority carrier lifetime and the carrier diffusion length have a strong relationship with the carrier recombination rate. Additionally, parasitic resistances have an important effect on the fill factor of a solar cell. Within this context, the alternating current (AC) and direct current (DC) electrical characteristics of Si-based metal–insulator–semiconductor (MIS) Schottky barrier diodes with the basic structure Al/Si/TiO2/NiCr were studied, aiming at using them as photovoltaic devices. The basic diode structure was modified by adding nanostructured porous silicon (nanoPS) layers and by infiltrating silver nanoparticles (AgNPs) into the nanoPS layers, leading to Al/Si+nanoPS/TiO2/NiCr and Al/Si+nanoPS+AgNPs/TiO2/NiCr structures, respectively. The AC electrical properties were studied using a combi...
Electrical characterization of novel Si solar cells
Thin Solid Films, 2006
A new approach for hybrid metal-insulator-semiconductor Si solar cells is adopted by the Institute of Fundamental Problems for High Technology, Ukrainian Academy of Sciences. In this technique, the porous silicon layers are created on both sides of single crystal wafers by chemical etching before an improved MIS cell preparation process. Using this technique, the solar cells with efficiencies above 15% have been obtained under AM1.5 condition (under 100 mW/cm 2 illumination at 25 -C). In this work the dark current -voltage -temperature (I -V -T) characteristics of these cells are studied over a temperature range between 79 and 400 K. The dark capacitance -voltage (C -V) and conductancevoltage ( G -V) behaviours of these cells at 100 kHz are analysed for the same temperature range. At room temperature C -V and G -V measurements are also made under illumination levels changing five folds. The diode ideality factors calculated from the dark I -V characteristics are significantly larger than unity and exhibit strong temperature dependence. The analysis of the temperature tendencies of diode ideality factor in these cells indicated that the current transport mechanism consists of both the trap-assisted tunnelling and the thermionic emission. While the temperature decreases, the barrier height calculations from I -V -T and C -V -T measurements showed that / B (I À V) decreases whereas / B (C À V) increases. The difference in / B (I À V) and / B (C À V) values and in their temperature dependence are explained by a model assuming Gaussian distribution of barrier heights. All the results are analysed after series resistance corrections. D
Influence of the Schottky barrier height on the silicon solar cells
— With the recent introduction of ion implantation in the photovoltaic industry, it is now easier to carefully tailor the emitter doping profile. However the metallization layout should be optimized in the same time, as they are closely linked via the metal/silicon contact resistivity. In this work, an advanced co-optimization procedure allows finding out the influence of the Schottky barrier height on the metal grid design and the optimal doping profile. The theoretical electrical properties of a 2 x 2 cm² ideal silicon solar cell are also computed for each optimal combination. According to this work, the maximal achievable efficiency decreases from 26.2 % to 25.3 % if the Schottky barrier height increases from 0.5 eV to 0.9 eV.
High-barrier height Sn/p-Si schottky diodes with interfacial layer by anodization process
We have fabricated the Sn/p-Si Schottky barrier diodes with different surface treatments. Prior to the Sn evaporation on the p-Si(0 0 1), the ®rst kinds of samples consisted of a dip in diluted aqueous HF solution followed by a rinse in de-ionized water (sample 1, SD1), the second kinds of samples several steps of anodization in aqueous KOH solution each followed by a dip in diluted aqueous HF solution and a subsequent rinse in de-ionized water (sample 2, SD2), and the third kinds of samples one anodization step only (sample 3, SD3). We have found the lowest values of both the barrier heights and ideality factors with the diodes of preparation type SD2. The anodization, on the other hand, have increased both, the barrier heights as well as the ideality factors. The extrapolation of the barrier heights versus ideality factors plot to the ideality factor determined by the image force effect have given the laterally homogeneous barrier heights of approximately 0.75 and 0.92 eV for the SD2 and SD3 diodes. Furthermore, we have calculated a mean tunneling barrier height of w 0X12 eV for the MIS Sn/p-Si diodes with the anodic oxide layer.
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We studied the electrical characteristics of a Schottky diode with organic components Sn/methyl-violet/p-Si/Al. We investigated the diode's current-voltage (I-V), capacitance-voltage (C-V), and capacitance-frequency (C-f). From ln(I)-V plots of the diodes, ideality factor (n) and saturation current (I 0) were calculated. Moreover, the barrier height (Ф b) and series resistance (R S) were calculated with Cheungs' and Norde functions. Results shown that at the methyl-violet layerplayed an important role in electrical properties such as series resistance, barrier height, ideality factor and capacitance.
Performance Analysis of Simplified Silicon Solar Cell on P-Type Crystalline Silicon Wafer
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Crystalline silicon (c-Si) wafers are the dominating substrate materials for solar cells in current photovoltaic (PV) industry. Silicon (Si) wafer with positive-type (p-type) based solar cells dominates almost 95% of the global PV market. Recent goal in Si solar cell industry is focusing on cost reduction through inexpensive manufacturing processes. Standard manufacturing process of Si solar cell fabrication consist of damage removal, cleaning, texturing, phosphorus oxytrichloride (POCl3) diffusion, antireflective coating (ARC) deposition, metallization by screen printing technique, firing and light current-voltage (LIV) testing. These fabrications line are time–consuming and high temperature process which lead to high manufacturing cost. This study presents the simplification of Si solar cell fabrication on p-type Si wafer. Simplified fabrication process eliminates the ARC deposition by plasma enhanced chemical vapour deposition (PECVD). Simplified Si solar cell was fabricated with...
Silicon, 2019
Sb, Tb 3+)-doped SnO 2 thin films were deposited on monocrystalline silicon (Si) and on porous silicon (PS) layer from sol-gel spin coating method. The photoluminescence spectrum shows that Tb 3+ ions presents higher emission with the PS layer. The fabricated junctions are treated as a metal-semiconductor (MS) Schottky diodes. The current-voltage (I-V) characteristics of SnO 2 :Sb/p-Si (D 1), SnO 2 :Sb:Tb 3+ /p-Si (D 2) and SnO 2 :Sb:Tb 3+ /PS (p) (D 3) were measured for these diodes at room temperature. Electronic parameters such as ideality factor, barrier height and series resistance were calculated and compared for the main junctions. Based on the thermoionic emission model, it appears that the contacts presents non-ideal I-V behaviour with a relatively high values of ideality factor (n = 12 for Si based diode, and n = 24 for PS based diode) and a relatively large values of series resistance R S (R S = 2 10 3 Ω for D 3). After the incorporation of Tb 3+ , the junction characteristics show that the formed diode exhibits high forward current density and a decrease in the series resistance R S (R S = 600 Ω for D 2). The non-ideality character of the elaborated MS junctions seems to be principally due to the effects of the interface. The relatively high values of the ideality factor was attributed to the sharing of the applied voltage V by a diffusion potential (V D) across the semiconductor space charge region and a potential (V i) devoted to the interfacial layer formed between the silicon and the tin oxide. The trappedlimited current was found to dominate the current transport mechanisms through the fabricated junctions. The above results highlight the role of the interfacial layer and interface states in the determination of the electrical performance of Sb-doped SnO 2 / p-Si, (Sb, Tb 3+) co-doped SnO 2 /p-Si and (Sb, Tb 3+) co-doped SnO 2 /PS(p). They show that the simultaneous presence of Tb 3+ ions and porous silicon layer allows an obvious enhancement of both optical and electrical properties of the main junction increasing then the applicability of SnO 2 /silicon based devices.