Mismatch in photodiode and phototransistor arrays (original) (raw)
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International Journal of Electronics, 2011
In this report, the performance of a particular pixel's architecture is evaluated. It consists mainly of an optical sensor coupled to an amplifier. The circuit contains photoreceptors such as phototransistors and photodiodes. The circuit integrates two main blocks: (a) the pixel architecture, containing four p-channel transistors and a photoreceptor, and (b) a current source for biasing the signal conditioning amplifier. The generated photocurrent is integrated through the gate capacitance of the input p-channel MOS transistor, then converted to voltage and amplified. Both input transistor and current source are implemented as a voltage amplifier having variable gain (between 10dB and 32dB). Considering characterisation purposes, this last fact is relevant since it gives a degree of freedom to the measurement of different kinds of photo-devices and is not limited to either a single operating point of the circuit or one kind and size of photo-sensor. The gain of the amplifier can be adjusted with an external DC power supply that also sets the DC quiescent point of the circuit. Design of the row-select transistor's aspect ratio used in the matrix array is critical for the pixel's amplifier performance. Based on circuit design data such as capacitance magnitude, time and voltage integration, and amplifier gain, characterisation of all the architecture can be readily carried out and evaluated. For the specific technology used in this work, the spectral response of photo-sensors reveals performance differences between phototransistors and photodiodes. Good approximation between simulation and measurement was obtained.
Which Photodiode to Use: A Comparison of CMOS-Compatible Structures
IEEE Sensors Journal, 2000
While great advances have been made in optimizing fabrication process technologies for solid state image sensors, the need remains to be able to fabricate high quality photosensors in standard CMOS processes. The quality metrics depend on both the pixel architecture and the photosensitive structure. This paper presents a comparison of three photodiode structures in terms of spectral sensitivity, noise and dark current. The three structures are n + /p-sub, n-well/p-sub and p + /n-well/p-sub. All structures were fabricated in a 0.5 μm 3-metal, 2-poly, n-well process and shared the same pixel and readout architectures. Two pixel structures were fabricated-the standard three transistor active pixel sensor, where the output depends on the photodiode capacitance, and one incorporating an in-pixel capacitive transimpedance amplifier where the output is dependent only on a designed feedback capacitor. The n-well/p-sub diode performed best in terms of sensitivity (an improvement of 3.5 × and 1.6 × over the n + /p-sub and p + /n-well/p-sub diodes, respectively) and signal-to-noise ratio (1.5 × and 1.2 × improvement over the n + /p-sub and p + /n-well/p-sub diodes, respectively) while the p + /n-well/p-sub diode had the minimum (33% compared to other two structures) dark current for a given sensitivity.
Characterization of standard CMOS compatible photodiodes and pixels for Lab-on-Chip devices
2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
High quality CMOS image sensors are of great importance for LoC-Lab-on-Chip devices based on optical measurements. The main target in these devices is to minimize the cost and area while achieving a good resolution. The performance parameters of image sensor pixels and CMOS compatible photodiodes depend on the size, type and the geometry of the photodiode layout and varies for each technology. In this study, we present a comparative analysis of CMOS compatible photodiode types at different areas. The results have shown n-well/p-sub type photodiode with 5 × 5 µm 2 diffusion area achieves the highest sensitivity (69.81 × 10 12 V.s −1 .cm −2 /W.cm −2) and with 40 × 40 µm 2 diffusion area, highest SNR-Signal-to-Noise Ratio (72.26dB) at 630 nm, while the p + /n-well/p-sub type photodiode with 40 × 40 µm 2 diffusion area results in highest responsivity (0.466 A.cm −2 /W.cm −2) at the same wavelength.
2002 Conference on Optoelectronic and Microelectronic Materials and Devices. COMMAD 2002. Proceedings (Cat. No.02EX601), 2002
Standard CMOS fabrication processes provide the means to realize the further development of hack illuminated photodiode arrays for imaging systems. We have simulated crosstalk effects in a back illuminated CMOS compatible photodiode array, and compared this effect with that predicted for front illuminated arrays, using a two dimensional simulation model. It was found that the crosstalk in back illuminated arrays is generally greater than that for front illuminated arrays with identical structure, although this effect can be reduced by decreasing the thickness of the array. The n-well junction depth had little effect on the crosstalk predicted for the back illuminated case.
Pixel Structure Effects on Crosstalk in Backwall Illuminated CMOS Compatible Photodiode Arrays
2004
CMOS imaging arrays in back-illuminated mode provide a means to realize photodiode arrays for high resolution imaging systems, provided crosstalk effects can be reduced to the level of those observed in front-illuminated arrays. In this study, we have simulated the crosstalk in back-illuminated and front-illuminated arrays as a function of different structural configurations, including the presence of biased guard electrodes in single junction photodiodes, or the development of double junction photodiodes. The results obtained show that significant crosstalk suppression can be achieved in back-illuminated arrays for these structures. The physical mechanisms responsible for electrical crosstalk, and its subsequent suppression, are explained using an absorption volume proportion concept.
Integrated Photodiodes in Nanometer CMOS Technologies
Electrical and Electronics Engineering: An International Journal, 2014
The main speed limitations of standard nanometer CMOS photodiodes are coming from the substrate slow carriers diffusion. Also the capacitance of the photodiode is increasing with technology scaling as the doping is increasing. The PD capacitance must be as low as possible to reduce the high frequency loss of the photocurrent to reach highest possible sensitivity. These demands are partially conflicting; so a trade-off is necessary, especially due to the wavelength dependence of the penetration depth. Many photodiode structures are recently introduced to increase the photodiode intrinsic speed in nanometer CMOS technology. In this paper a theoretical and comparative study for different recently published photodiodes structures fabricated in nanometre CMOS technology will be presented. This paper gives the researchers a detailed comparison and analysis to select the right photodiode to achieve the best performance in challenging nanometre CMOS technology.
High speed photodiodes in standard nanometer scale CMOS technology: a comparative study
Optics Express, 2012
This paper compares various techniques for improving the frequency response of silicon photodiodes fabricated in mainstream CMOS technology for fully integrated optical receivers. The three presented photodiodes, Spatially Modulated Light detectors, Double, and Interrupted P-Finger photodiodes, aim at reducing the low speed diffusive component of the photo generated current. For the first photodiode, Spatially Modulated Light (SML) detectors, the low speed current component is canceled out by converting it to a common mode current driving a differential transimpedance amplifier. The Double Photodiode (DP) uses two depletion regions to increase the fast drift component, while the Interrupted-P Finger Photodiode (IPFPD) redirects the low speed component towards a different contact from the main fast terminal of the photodiode. Extensive device simulations using 130 nm CMOS technology-parameters are presented to compare their performance using the same technological platform. Finally a new type of photodiode that uses triple well CMOS technology is introduced that can achieve a bandwidth of roughly 10 GHz without any process modification or high reverse bias voltages that would jeopardize the photodetector and subsequent transimpedance amplifier reliability.
Photodiode Peripheral Utilization Effect on CMOS APS Pixel Performance
IEEE Transactions on Circuits and Systems I: Regular Papers, 2000
A photodiode (PD)-type CMOS active pixel sensor (APS) pixel is comprised of a reverse-biased p-n-junction diode (PD) for photon conversion and charge storage, and a number of MOS transistors. Junction capacitance of the PD has two major components; bottom plate (area) and side wall (periphery). Both play important roles in the electro-optical performance of PD-APS pixels. This paper reports PD peripheral junction utilization effects on the pixel's electro-optical performance, full-well capacity and spectral response for an 18 m 18 m CMOS PD-APS pixel were improved by opening multiple circular holes in the PD diffusion layer. A prototype CMOS APS imager was designed, fabricated, and tested in 0.5m, 5 V, 2P3M CMOS process, containing a 424 424 pixel array with smaller sub-arrays for multiple pixel designs. Four test pixels with 7, 11, 14, and 17 circular, 1.6-m-diameter holes were placed on one pixel array, with one control pixel for reference. Pixel characteristics, dark current, PD capacitance, quantum efficiency, sensitivity, and pixel full-well capacity were measured. It was found that increased PD junction peripheral would potentially help to improve total capacitance of the PD, with the expense of higher dark current. We also found that increased PD peripheral capacitance improves spectral response up to 12% of the PD-APS pixel, especially at short wavelengths.
CMOS photodetector systems for low-level light applications
2009
In this work, we have designed, fabricated and measured the performance of three different active pixel sensor (APS) structures. These APS structures are studied in the context of applications that require low-level light detection systems. The three APS structures studied were-a conventional APS, an APS with a comparator, and an APS with an integrator. A special focus of our study was on both the signal and noise characteristics of each APS structure so the key performance metric of signal-to-noise ratio can be computed and compared. The pixel structures that are introduced in this work can cover a wide range of applications, such as high resolution digital photography using the APS with a comparator, to ultra-sensitive biomedical measurements using the APS with an integrator.
2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2018
Many imaging applications, like medical or space applications, require radiation-hard sensors. Generally, during radiation, many different defects are created, depending on the type of the radiation. With TCAD software, cross-section of a radiation-hard photodiode was simulated, and afterwards the impact of different physical parameters was simulated. Physical parameters like epitaxial layer thickness or the trap density in the bulk, play a huge role towards the responsivity of the photodiode. This paper presents a variation experiment, where relevant physical parameters are varied and analysis of the spectral responsivity and dark current of the photodiode is discussed.