Field Programmable Analog Array Research Papers (original) (raw)

Sigma-Delta modulators (SDMs) are ubiquitous for implementation of high resolution analog-to-digital converters (ADCs.) However, SDMs are applicable to other signal processing functions such as signal multiplication and filtering. This... more

Sigma-Delta modulators (SDMs) are ubiquitous for implementation of high resolution analog-to-digital converters (ADCs.) However, SDMs are applicable to other signal processing functions such as signal multiplication and filtering. This paper will introduce via-configurable array technology as a cost effective approach for developing circuits like SDMs and provide application examples using these techniques.

The design of a high-frequency field-programmable analog array (FPAA) is presented. The FPAA is based on a regular pattern of cells interconnected locally for high frequency performance. No switches of any kind are used in the signal path... more

The design of a high-frequency field-programmable analog array (FPAA) is presented. The FPAA is based on a regular pattern of cells interconnected locally for high frequency performance. No switches of any kind are used in the signal path of a cell: programming of the functions, parameters, and interconnections is achieved solely by modifying cells' bias conditions digitally. Limited global signal interconnections are also available for those application circuits which cannot be mapped onto locally-only interconnected structure. Key circuits of the FPAA have been fabricated in a CPI transistor-array bipolar technology.

This paper presents a variety of applications of an FPAA based on a regular pattern of signal-processing cells and primarily local signal interconnections. Despite the limitations introduced by local interconnections, the presented... more

This paper presents a variety of applications of an FPAA based on a regular pattern of signal-processing cells and primarily local signal interconnections. Despite the limitations introduced by local interconnections, the presented architecture accommodates a wide variety of linear and nonlinear circuits found in many signal processing systems. Thus it effectively proves that it is possible to improve the performance of an FPAA by means of constraining the interconnection pattern, without significantly limiting the class of circuits it can implement.

In this paper the theoretical bases to design a true random bit generator (TRBG) circuit with a predefined minimum entropy are discussed. The approach is tailored to TRBGs based on a one-dimensional piecewise-linear chaotic map, and it is... more

In this paper the theoretical bases to design a true random bit generator (TRBG) circuit with a predefined minimum entropy are discussed. The approach is tailored to TRBGs based on a one-dimensional piecewise-linear chaotic map, and it is based on a feedback control procedure that allows to dynamically changing the system parameters. For this purpose, the procedure just exploits the TRBG output observation without requiring bit throughput reduction. The design approach was validated by an hardware prototype implemented on a field programmable analog array (FPAA)

The design of a high-frequency field-programmable analog array (FPAA) is presented. The FPAA is based on a regular pattern of cells interconnected locally for high frequency performance. No switches of any kind are used in the signal path... more

The design of a high-frequency field-programmable analog array (FPAA) is presented. The FPAA is based on a regular pattern of cells interconnected locally for high frequency performance. No switches of any kind are used in the signal path of a cell: programming of the functions, parameters, and interconnections is achieved solely by modifying cells' bias conditions digitally. Limited global signal interconnections are also available for those application circuits which cannot be mapped onto locally-only interconnected structure. Key circuits of the FPAA have been fabricated in a CPI transistor-array bipolar technology.

In electrical engineering schools, control systems are usually taught through lectures, tutorials, projects and labs. Obviously, it is during projects and labs that students acquire most of their know-how in this field. Nowadays, because... more

In electrical engineering schools, control systems are usually taught through lectures, tutorials, projects and labs. Obviously, it is during projects and labs that students acquire most of their know-how in this field. Nowadays, because real systems are complex and expensive, students learn more and more often from virtual systems. The objective of this paper is to propose the use of Field Programmable Analog Array to assist teachers in their education task. With this programmable analog components, students are able to create classical systems and extract from it real measurements.

The design of a high-frequency field-programmable analog array (FPAA) is presented. The FPAA is based on a regular pattern of cells interconnected locally for high frequency performance. No switches of any kind are used in the signal path... more

The design of a high-frequency field-programmable analog array (FPAA) is presented. The FPAA is based on a regular pattern of cells interconnected locally for high frequency performance. No switches of any kind are used in the signal path of a cell: programming of the functions, parameters, and interconnections is achieved solely by modifying cells' bias conditions digitally. Limited global signal interconnections are also available for those application circuits which cannot be mapped onto locally-only interconnected structure. Key circuits of the FPAA have been fabricated in a CPI transistor-array bipolar technology.

This paper presents a variety of applications of an FPAA based on a regular pattern of signal-processing cells and primarily local signal interconnections. Despite the limitations introduced by local interconnections, the presented... more

This paper presents a variety of applications of an FPAA based on a regular pattern of signal-processing cells and primarily local signal interconnections. Despite the limitations introduced by local interconnections, the presented architecture accommodates a wide variety of linear and nonlinear circuits found in many signal processing systems. Thus it effectively proves that it is possible to improve the performance of an FPAA by means of constraining the interconnection pattern, without significantly limiting the class of circuits it can implement.

This work discusses an Evolvable Hardware (EHW) platform for the intrinsic evolution of analog electronic circuits. The EHW analog platform, named PAMA-NG (Programmable Analog Multiplexer Array-Next Genera- tion), is a reconfigurable... more

This work discusses an Evolvable Hardware (EHW) platform for the intrinsic evolution of analog electronic circuits. The EHW analog platform, named PAMA-NG (Programmable Analog Multiplexer Array-Next Genera- tion), is a reconfigurable platform that consists of integrated circuits whose in- ternal connections can be programmed by Evolutionary Computation tech- niques, such as Genetic Algorithms (GAs), to synthesize circuits. The PAMA- NG

This article presents methods to translate a behavioral-level analog description into a Field Programmable Analog Array (FPAA) implementation. The methods consist of several steps that are referred to as function decomposition, macrocell... more

This article presents methods to translate a behavioral-level analog description into a Field Programmable Analog Array (FPAA) implementation. The methods consist of several steps that are referred to as function decomposition, macrocell synthesis, placement and routing, and postplacement simulation. The focus of this article is on the first three steps. The function decomposition step deals with decomposing a high-order system function into a set of lower-order functions. We present an efficient procedure for searching for an optimal solution. This procedure is based on first formally demonstrating the equivalence of two previously used optimization criteria. The objective of the macrocell synthesis step is to generate a hardware realization. A modified signal flow graph is introduced to represent FPAA circuits and graph transformations are used to identify the realizations that comply with the FPAA hardware constraints. The modified signal flow graph also allows scaling of capacit...

We propose a novel approach to the realization of continuous, fuzzy, and multi-valued logic (mvl) circuits. We demonstrate how a general-purpose field programmable analog array (FPAA), with cells realizing simple arithmetic operations on... more

We propose a novel approach to the realization of continuous, fuzzy, and multi-valued logic (mvl) circuits. We demonstrate how a general-purpose field programmable analog array (FPAA), with cells realizing simple arithmetic operations on signals, can be used for this purpose. The FPAA, which is being implemented in a bipolar transistor array technology, operates from ±3.3 V or ±5 V power supplies and works in the range of frequencies up to several hundred MHz

... Hasler, and Sung Kyu Lim School of Electrical and Computer Engineering, Georgia Institute of Technology Atlanta, GA 30332 {baskaya, dva, phasler ... With the component density of these devices, small analog circuits as well as larger... more

... Hasler, and Sung Kyu Lim School of Electrical and Computer Engineering, Georgia Institute of Technology Atlanta, GA 30332 {baskaya, dva, phasler ... With the component density of these devices, small analog circuits as well as larger analog systems can be synthesized and ...

ABSTRACT In this paper, the guidelines to design a true random number generator (TRNG) circuit of uniform distributed numbers. The approach is proposed for a TRNG based on a one-dimensional piecewise-linear chaotic map and it is suitable... more

ABSTRACT In this paper, the guidelines to design a true random number generator (TRNG) circuit of uniform distributed numbers. The approach is proposed for a TRNG based on a one-dimensional piecewise-linear chaotic map and it is suitable for the development of integrated TRNG circuits. In particular, the proposed design strategy is based on a feedback control procedure that allows to dynamically change the system parameters for the correction of the circuit "non-idealities" (e.g. the circuit offsets). The correction algorithm does not require a direct measurement of the system "non-idealities" or of the effective value of the map parameters, but only a dynamic estimation of these quantities based on the observation of the TRNG output. The design approach is validated by a hardware prototype implemented on a field programmable analog array (FPAA)

In this work the problem of Single Event Upset (SEU) is considered in a recent analog technology: The Field Programmable Analog Arrays (FPAAs). Some FPAA models are based on SRAM memory cells to implement the user programmability, which... more

In this work the problem of Single Event Upset (SEU) is considered in a recent analog technology: The Field Programmable Analog Arrays (FPAAs). Some FPAA models are based on SRAM memory cells to implement the user programmability, which makes this kind of device vulnerable to SEU when employed in applications susceptible to the incidence of radiation. In a previous work