Arithmetic Microoperations in Registers (original) (raw)

Arithmetic Micro-operations in Registers

Last Updated : 3 Apr, 2026

Fundamental operations performed directly on data stored in the CPU registers. They involve basic arithmetic processes such as addition, subtraction, incrementing, and decrementing.

Registers temporarily hold numbers or data during CPU operations. These simple operations form the foundation for more complex calculations, enabling the CPU to execute programs efficiently.

**Addition

In an addition micro-operation, the contents of two registers are added together using an arithmetic circuit, typically a binary adder. For example, the value in register R1 is added to the value in register R2, and the resulting sum is stored in R3. This operation demonstrates how binary addition is executed at the hardware level during processor execution.

**Subtraction

In the subtraction micro-operation, the contents of register R2 are subtracted from the contents of register R1 using a binary subtractor circuit, and the result is stored in register R3. This operation can be represented as R3 ← R1 − R2, illustrating how subtraction is performed at the hardware level.

Another common method for performing subtraction is by using 2's complement. In this approach, the 2's complement of the contents of R2 is added to the contents of R1, which is logically equivalent to R1 − R2. The result of this operation is then stored in R3, effectively implementing subtraction using an adder circuit.

**Increment

In the increment micro-operation, the value stored in register R1 is increased by 1 using a binary incrementor circuit. This operation is commonly represented as R1 ← R1 + 1, and is often used in tasks like loop counters or address progression.

**Decrement

In the decrement micro-operation, the value stored in register R1 is decreased by 1 using a binary decrementor circuit. This operation is represented as R1 ← R1 − 1 and is often used in control operations such as loop termination or reverse counting.

**1's Complement

In this micro-operation, the complement of the value stored in register R1 is calculated, typically by inverting each bit of the register’s contents. This operation is useful for logical manipulations and bitwise operations.

**2's Complement

Ihe value in register R2 is obtained by taking its 1’s complement and then adding 1. The result represents the negation of the original value and can be stored in any destination register. This operation is equivalent to −R2.

Hardware Implementation of Arithmetic Micro-operations

An n-bit binary adder-subtractor is a combinational circuit that performs both addition and subtraction on two n-bit binary numbers using shared hardware.

Below is the logic circuit for a 4-bit Binary Adder-Subtractor:

binary_adder_subtractor

Additionally, a 4-bit arithmetic circuit used to perform various micro-operations consists of 5 NOT gates, four 4×1 multiplexers, and four full adders. These components work together to implement operations such as addition, subtraction, increment, decrement, and complement. The specific function performed depends on the control inputs, as shown in the function table below.

Select Input Output Microoperation
S1S0Cin Y E = A + Y + Cin
000 B E = A + B Add
001 B E = A + B + 1 Add with carry
010 E = A + B̅ Subtract with borrow
011 E = A + B̅ + 1 Subtract
100 0 E = A Transfer A
101 0 E = A + 1 Increment A
110 1 E = A - 1 Decrement A
111 1 D = A Transfer A

Arithmetic Micro-operations and Examples

These arithmetic micro-operations are used in combination with logical micro-operations, such as AND, OR, and NOT, to perform more complex calculations and manipulate data within the CPU.

Micro-operation Description
Addition Adds two register values: R3 ← R1 + R2
Subtraction Subtracts one register value from another: R3 ← R1 - R2
Increment Adds 1 to a register: R1 ← R1 + 1
Decrement Subtracts 1 from a register: R1 ← R1 - 1
1’s Complement Flips all bits of a register: R1 ← ¬R1
2’s Complement ¬R1 + 1 (Negation): R1 ← -R1
Multiplication Multiplies two registers: R3 ← R1 × R2
Division Divides one register by another: Quotient in R1, Remainder in R2
Shift Shifts bits left/right: R1 ← shl R1