Half Adder and Half Subtractor using NAND NOR gates (original) (raw)

Last Updated : 23 Jul, 2025

A Half Adder is a digital circuit that adds two single-bit binary numbers and outputs the sum and carry. It can be implemented using either NAND gates or with NOR gates.

**When using NAND gates : The sum output is given by A AND B. The carry output is given by the A AND B. ​

W​**hen NOR gate is used :** The sum output is NOR of the inputs A and B. Carry output is OR of the inputs A and B.

Half Subtractor is any electronic system which takes two one-bit binary numbers as inputs and generates the difference** along with borrow as output. Besides, they can also be made using NAND or NOR gates.

**While applying NAND gates : The Difference output is given by, the NAND for the inputs (A and B). While the borrow output is given by NAND, input A and inverted input B.

**Conversely for NOR gates : The difference output has been obtained by NOR operation on (A and B) inputs. While the borrow produces NOT operation on input A and B.

These circuits act as basic blocks in digitization whereas they are very important regarding numerical calculations in computers.

What is Half Adder

A Half Adder is an inverter that takes two binary numbers of single bit and adds them. The two inputs represent the bits inputted for addition while there are two outputs. These outputs indicate a sum bit and carry bit respectively.

**Block Diagram of Half Adder

Half-Adder

Block Diagram for Half Adder

**Truth Table of Half Adder

A B** S (Sum) C (Carry)
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

What is Half Subtractor

A half subtractor is another digital circuit that is used in binary subtraction. It works on two single-bit binary numbers. It has two inputs and two outputs like the half adder, again. The minuend (i.e., the number from which something is going to be deducted), and the subtrahend (the number that this something will represent), form the inputs. On the other hand, the outputs include a difference bit and a borrow bit.

**Block Diagram of Half Subtractor

Half-Subtractor

Block Diagram for Half Subtractor

**Truth Table of Half Subtractor

A B Diff Borrow
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0

Implementation

**Implementation of Half Adder using NAND gates:

Total 5 NAND gates are required to Implement Half Adder**Implementation of Half Adder using NOR gates:

Total 5 NOR gates are required to implement Half Adder **Implementation of Half Subtractor using NAND gates:

Total 5 NAND gates are required to Implement Half Subtractor**Implementation of Half Subtractor using NOR gates:

Total 5 NOR gates are required to Implement Half Subtractor

Advantages of Using NAND and NOR Gates to Implement Half Adder and Half Subtractor

Disadvantages of Using NAND and NOR Gates to Implement Half Adder and Half Subtractor