GATE-CS-2005 (original) (raw)

Normally user programs are prevented from handling I/O directly by I/O instructions in them. For CPUs having explicit I/O instructions, such I/O protection is ensured by having the I/O instructions privileged. In a CPU with memory mapped I/O, there is no explicit I/O instruction. Which one of the following is true for a CPU with memory mapped I/O?

Suppose the round trip propagation delay for a 10 Mbps Ethernet having 48-bit jamming signal is 46.4 ms. The minimum frame size is

Consider the following C-function:

C `

double foo (int n) { int i; double sum; if (n = = 0) return 1.0; else { sum = 0.0; for (i = 0; i < n; i++) sum += foo (i); return sum; } }

`

Suppose we modify the above function foo() and store the values of foo (i), 0 < = i < n, as and when they are computed. With this modification, the time complexity for function foo() is significantly reduced. The space complexity of the modified function would be:

Consider the following C-function:

C `

double foo (int n){ int i; double sum; if (n = = 0) return 1.0; else{ sum = 0.0; for (i = 0; i < n; i++) sum += foo (i); return sum; } }

`

The space complexity of the above function is:

What does the following C-statement declare? [1 mark]

C `

int ( * f) (int * ) ;

`

Consider the following C-program:

C `

double foo (double); /* Line 1 */

int main() {

double da, db;

// input da

db = foo(da);

}

double foo(double a) { return a; }

`

The above code compiled without any error or warning. If Line 1 is deleted, the above code will show:

Consider the following C-program:

C `

void foo(int n, int sum) { int k = 0, j = 0; if (n == 0) return; k = n % 10; j = n / 10; sum = sum + k; foo (j, sum); printf ("%d,", k); }

int main () { int a = 2048, sum = 0; foo (a, sum); printf ("%d\n", sum);

getchar(); }

`

What does the above program print?

Consider line number 3 of the following C- program.

C `

int main ( ) { /* Line 1 / int I, N; / Line 2 / fro (I = 0, I < N, I++); / Line 3 */ }

`

Identify the compiler's response about this line while creating the object-module

A device with data transfer rate 10 KB/sec is connected to a CPU. Data is transferred byte-wise. Let the interrupt overhead be 4 microsec. The byte transfer time between the device interface register and CPU or memory is negligible. What is the minimum performance gain of operating the device under interrupt mode over operating it under program controlled mode?

Consider a disk drive with the following specifications: 16 surfaces, 512 tracks/surface, 512 sectors/track, 1 KB/sector, rotation speed 3000 rpm. The disk is operated in cycle stealing mode whereby whenever one byte word is ready it is sent to memory; similarly, for writing, the disk interface reads a 4 byte word from the memory in each DMA cycle. Memory cycle time is 40 nsec. The maximum percentage of time that the CPU gets blocked during DMA operation is:

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