Issue 46406: optimize int division (original) (raw)

The PR was directly inspired by Mark Dickinson's code in the email thread directly using asm to get the instruction he wanted. There is usually a way to make the compiler actually do what you intend. This appears to be it.

Interestingly, experimenting with small code snippets rather than the entire longobject.c on gotbolt.org to check various compilers output does not always yield as nice of a result. (clang 11+ showed promise there, but this change benefits gcc equally as well in real world CPython microbenchmark timeit tests). https://godbolt.org/z/63eWPczjx was my playground code.

$ ./b-clang13/python -m timeit -n 1500000 -s 'x = 10**1000; r=x//10; assert r == 10**999, r' 'x//17'
1500000 loops, best of 5: 450 nsec per loop
$ ./b-clang13-new-basic-divrem1/python -m timeit -n 1500000 -s 'x = 10**1000; r=x//10; assert r == 10**999, r' 'x//17'
1500000 loops, best of 5: 375 nsec per loop
$ ./b-gcc9/python -m timeit -n 1500000 -s 'x = 10**1000; r=x//10; assert r == 10**999, r' 'x//17'
1500000 loops, best of 5: 448 nsec per loop
$ ./b-gcc9-new-basic-divrem1/python -m timeit -n 1500000 -s 'x = 10**1000; r=x//10; assert r == 10**999, r' 'x//17'
1500000 loops, best of 5: 370 nsec per loop

That's on an AMD zen3 (x86_64). Also tested with other divisors, 17 is not specialized by the compiler. These were not --enable-optimizations builds, though the results remain similar on those for non-specialized values as x//10 turns into when using -fprofile-values on gcc9.

Performance tests using other architectures forthcoming.

A pyperformance suite run on a benchmark-stable host is worthwhile. I don't actually expect this to show up as significant in most things there; we'll see.

The new code is not any more difficult to maintain than the previous code regardless.

I tested my PR branch on 32-bit arm (raspbian bullseye) and the microbenchmark timing shows no change (within the noise across repeated runs). Unsurprising as division is entirely different on 32-bit arm.

Raspbian uses armv6 for compatibility with the original rpi and rpi0. armv6 does not have an integer division instruction. (how RISCy of it) But that doesn't make a difference in this code as the final 32-bit arm ISA, armv7-a, only has a 32:32 divider. (armv8 aka aarch64 is 64-bit and uses a UDIV as one would expect)

anyways, that satisfies me that it isn't making anything worse elsewhere.