Jeffrey Law - Re: [m68k 13/13] restrict bitfield operations with dynamic parameter (original) (raw)

This is the mail archive of the gcc-patches@gcc.gnu.orgmailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

On Tue, 2007-01-30 at 12:26 +0100, zippel@linux-m68k.org wrote:

Hi,

When combine creates a bitfield instruction it assumes simple shift operations, but it doesn't work quite that way on m68k. If the bitfield crosses the register boundary it wraps around, thus it actually is a rotate operation.

This example demonstrates where it goes wrong (reduced from emacs):

#define XINT(v) (((int)(v) << 4) >> 4) #define XUINT(v) (((unsigned)(v) << 4) >> 4)

int f(int v, int s) { return (XUINT(v) >> -XINT(s)) & 0x0fffffff; }

gcc takes the shift and the mask and generates a bitfield op, but the real bitfield instruction wraps around at the register end and doesn't produce the expected result.

I guess it would be quite some work to teach combine about this and I don't know how these behave on other ports, so the simple solution below just disables dynamic offsets and widths for register arguments and while I'm at it I also cleaned up the predicates here as well. Yea, I don't think we should teach combine about this behavior :-)

2007-01-30 Roman Zippel zippel@linux-m68k.org

* config/m68k/m68k.md (extv,extzv,insv): disable dynamic
parameter for register bitfield operations, general predicates
cleanup

OK.

Jeff


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]