Richard Henderson - convert alpha to constraints.md (original) (raw)

This is the mail archive of the gcc-patches@gcc.gnu.orgmailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Tested alphaev67 on c and c++.

r~

    * config/alpha/constraints.md: New file.
    * config/alpha/alpha.c: Include tm-constrs.h.
    (alpha_const_ok_for_letter_p, alpha_const_double_ok_for_letter_p,
    alpha_extra_constraint): Remove.
    (alpha_emit_conditional_branch): Use satisfies_constraint_*.
    * config/alpha/alpha-protos.h: Update.
    * config/alpha/alpha.h (REG_CLASS_FROM_LETTER): Remove.
    (CONST_OK_FOR_LETTER_P, CONST_DOUBLE_OK_FOR_LETTER_P): Remove.
    (EXTRA_CONSTRAINT): Remove.
    * config/alpha/alpha.md: Include constraints.md.
    (adddi splitter): Use satisfies_constraint_*.
    * config/alpha/predicates.md (add_operand): Likewise.
    (sext_add_operand, addition_operation): Likewise.

extern rtx alpha_tablejump_addr_vec (rtx); extern rtx alpha_tablejump_best_label (rtx); --- config/alpha/alpha.c (revision 121856) +++ config/alpha/alpha.c (local) @@ -55,6 +55,8 @@ Boston, MA 02110-1301, USA. / #include "tree-gimple.h" #include "tree-flow.h" #include "tree-stdarg.h" +#include "tm-constrs.h" + / Specify which cpu to schedule for. / enum processor_type alpha_tune; @@ -588,96 +590,6 @@ resolve_reload_operand (rtx op) return op; } -/ Implements CONST_OK_FOR_LETTER_P. Return true if the value matches - the range defined for C in [I-P]. */

-bool -alpha_const_ok_for_letter_p (HOST_WIDE_INT value, int c) -{ - switch (c) - { - case 'I': - /* An unsigned 8 bit constant. / - return (unsigned HOST_WIDE_INT) value < 0x100; - case 'J': - /* The constant zero. */ - return value == 0; - case 'K': - /* A signed 16 bit constant. */ - return (unsigned HOST_WIDE_INT) (value + 0x8000) < 0x10000; - case 'L': - /* A shifted signed 16 bit constant appropriate for LDAH. */ - return ((value & 0xffff) == 0 - && ((value) >> 31 == -1 || value >> 31 == 0)); - case 'M': - / A constant that can be AND'ed with using a ZAP insn. / - return zap_mask (value); - case 'N': - / A complemented unsigned 8 bit constant. / - return (unsigned HOST_WIDE_INT) (~ value) < 0x100; - case 'O': - / A negated unsigned 8 bit constant. / - return (unsigned HOST_WIDE_INT) (- value) < 0x100; - case 'P': - / The constant 1, 2 or 3. */ - return value == 1 || value == 2 || value == 3;

-}

-/* Implements CONST_DOUBLE_OK_FOR_LETTER_P. Return true if VALUE - matches for C in [GH]. */

-bool -alpha_const_double_ok_for_letter_p (rtx value, int c) -{ - switch (c) - { - case 'G': - /* The floating point zero constant. */ - return (GET_MODE_CLASS (GET_MODE (value)) == MODE_FLOAT - && value == CONST0_RTX (GET_MODE (value)));

-}

-/* Implements CONST_DOUBLE_OK_FOR_LETTER_P. Return true if VALUE - matches for C. */

-bool -alpha_extra_constraint (rtx value, int c) -{ - switch (c) - { - case 'Q': - return normal_memory_operand (value, VOIDmode); - case 'R': - return direct_call_operand (value, Pmode); - case 'S': - return (GET_CODE (value) == CONST_INT - && (unsigned HOST_WIDE_INT) INTVAL (value) < 64); - case 'T': - return GET_CODE (value) == HIGH; - case 'U': - return TARGET_ABI_UNICOSMK && symbolic_operand (value, VOIDmode); - case 'W': - return (GET_CODE (value) == CONST_VECTOR - && value == CONST0_RTX (GET_MODE (value))); - default: - return false; - } -}

/* The scalar modes supported differs from the default check-what-c-supports version in that sometimes TFmode is available even when long double indicates only DFmode. On unicosmk, we have the situation that HImode @@ -2580,15 +2492,12 @@ alpha_emit_conditional_branch (enum rtx_ && !(symbolic_operand (op0, VOIDmode) || (GET_CODE (op0) == REG && REG_POINTER (op0)))) { - HOST_WIDE_INT v = INTVAL (op1), n = -v; + rtx n_op1 = GEN_INT (-INTVAL (op1)); - if (! CONST_OK_FOR_LETTER_P (v, 'I') - && (CONST_OK_FOR_LETTER_P (n, 'K') - || CONST_OK_FOR_LETTER_P (n, 'L'))) - { - cmp_code = PLUS, branch_code = code; - op1 = GEN_INT (n); - } + if (! satisfies_constraint_I (op1) + && (satisfies_constraint_K (n_op1) + || satisfies_constraint_L (n_op1))) + cmp_code = PLUS, branch_code = code, op1 = n_op1; } } --- config/alpha/alpha.h (revision 121856) +++ config/alpha/alpha.h (local) @@ -600,63 +600,6 @@ enum reg_class { #define INDEX_REG_CLASS NO_REGS #define BASE_REG_CLASS GENERAL_REGS -/* Get reg_class from a letter such as appears in the machine description. */

-#define REG_CLASS_FROM_LETTER(C)
- ((C) == 'a' ? R24_REG
- : (C) == 'b' ? R25_REG
- : (C) == 'c' ? R27_REG
- : (C) == 'f' ? FLOAT_REGS
- : (C) == 'v' ? R0_REG
- : NO_REGS)

-/* Define this macro to change register usage conditional on target flags. / -/ #define CONDITIONAL_REGISTER_USAGE */

-/* The letters I, J, K, L, M, N, O, and P in a register constraint string - can be used to stand for particular ranges of immediate operands. - This macro defines what the ranges are. - C is the letter, and VALUE is a constant value. - Return 1 if VALUE is in the range specified by C.

-;; Include predicate definitions +;; Operand and operator predicates and constraints

(include "predicates.md") +(include "constraints.md")

;; First define the arithmetic insns. Note that the 32-bit forms also @@ -489,10 +490,11 @@ HOST_WIDE_INT val = INTVAL (operands[2]); HOST_WIDE_INT low = (val & 0xffff) - 2 * (val & 0x8000); HOST_WIDE_INT rest = val - low;

else if (! no_new_pseudos) { operands[3] = gen_reg_rtx (DImode); --- config/alpha/predicates.md (revision 121856) +++ config/alpha/predicates.md (local) @@ -1,5 +1,5 @@ ;; Predicate definitions for DEC Alpha. -;; Copyright (C) 2004, 2005, 2006 Free Software Foundation, Inc. +;; Copyright (C) 2004, 2005, 2006, 2007 Free Software Foundation, Inc. ;; ;; This file is part of GCC. ;; @@ -54,16 +54,14 @@ ;; Return 1 if the operand is a valid second operand to an add insn. (define_predicate "add_operand" (if_then_else (match_code "const_int")

;; Return 1 if the operand is a valid second operand to a ;; sign-extending add insn. (define_predicate "sext_add_operand" (if_then_else (match_code "const_int")

;; Return 1 if the operand is a non-symbolic constant operand that @@ -572,8 +570,7 @@ (define_predicate "addition_operation" (and (match_code "plus") (match_test "register_operand (XEXP (op, 0), mode) - && GET_CODE (XEXP (op, 1)) == CONST_INT - && CONST_OK_FOR_LETTER_P (INTVAL (XEXP (op, 1)), 'K')"))) + && satisfies_constraint_K (XEXP (op, 1))")))

;; For TARGET_EXPLICIT_RELOCS, we don't obfuscate a SYMBOL_REF to a ;; small symbolic operand until after reload. At which point we need --- config/alpha/constraints.md (revision 121856) +++ config/alpha/constraints.md (local) @@ -0,0 +1,122 @@ +;; Constraint definitions for DEC Alpha. +;; Copyright (C) 2007 Free Software Foundation, Inc. +;; +;; This file is part of GCC. +;; +;; GCC is free software; you can redistribute it and/or modify +;; it under the terms of the GNU General Public License as published by +;; the Free Software Foundation; either version 2, or (at your option) +;; any later version. +;; +;; GCC is distributed in the hope that it will be useful, +;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;; GNU General Public License for more details. +;; +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING. If not, write to +;; the Free Software Foundation, 51 Franklin Street, Fifth Floor, +;; Boston, MA 02110-1301, USA. + +;;; Unused letters: +;;; ABCDEF V YZ +;;; de ghijklmnopq stu wxyz + +;; Integer register constraints. + +(define_register_constraint "a" "R24_REG"

Property changes on: config/alpha/constraints.md


Name: svn:mime-type +Lisp/Scheme program text


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]