generateFPGADataCaptureIP - Open FPGA Data Capture Component Generator - MATLAB (original) (raw)

• Documentation
• Examples
• Functions
• Blocks
• Apps
• Videos
• Answers

Main Content

Open FPGA Data Capture Component Generator

Syntax

Description

Examples

collapse all

This example shows how to launch the FPGA Data Capture Component Generator tool.

Open Tool With Default Settings

Run the following command to launch the FPGA Data Capture Component Generator tool:

generateFPGADataCaptureIP

Input Arguments

collapse all

Option to reload the most recent design parameters, specified astrue or false. When you specify this input astrue, the FPGA Data Capture Component Generator tool opens and reloads the parameters of the most recent design. Otherwise, the tool opens with default settings.

Example: 'restore',true

Data Types: logical

MAT file containing design parameters, specified as a character vector or string scalar. Specify this input in one of these forms:

• _`datacapture`__generation_settings.mat — This MAT file holds the build parameters for a data capture IP specified by _`datacapture`_.
• multipleDatacaptureIPs_gensettings.mat — This MAT file holds the build parameters for all the generated data capture IPs.
  Note
  You can enable multiple data capture IPs only when targeting the AMD® devices over a JTAG interface.

This MAT file is a generated file in the same folder as your other generated data capture components. When you specify this input, the FPGA Data Capture Component Generator tool opens and reloads the parameters of the design specified by this value.

You must provide only the MAT file name if the file is in the current working folder.

Example: 'datacapture_generation_settings.mat'

You must provide the full path to the saved MAT file if the file is not in the current working folder.

Example: 'C:/home/user/datacapture_generation_settings.mat'

Data Types: char | string

Version History

Introduced in R2017a

expand all

The function reloads the parameters of a design you already generated and saved in a MAT file.

To reload the same design in your next iteration, provide the MAT file containing design parameters as an input argument to the function.

generateFPGADataCaptureIP('_datacapture__gensettings.mat');

Where_`datacapture`_ is the Generated IP name that you specify in the FPGA Data Capture Component Generator tool.