[LLVMdev] prevent an SDValue from lower into an immediate field in load (original) (raw)

Krzysztof Parzyszek kparzysz at codeaurora.org
Thu Jul 23 06:07:29 PDT 2015


On 7/22/2015 1:05 PM, Xiaochu Liu wrote:

But sometimes a load instruction is lowered into: (r2=lo16(symbol)) lw r1, r2(Hi16(symbol)) But what I want is: (r2=lo16(symbol)) (r3=hi16(symbol)) add r2, r2,r3 lw r1, r2(0) Can you please show me some hints?

This likely happens during instruction selection, but to make sure, could you run your testcase with -mllvm -debug-only=isel? This will show all steps of the translation from IR to MIR. You can then narrow down the place where this folding happens and take it from there.

-Krzysztof

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