[llvm-dev] Intrinsics for RISCV CSR instructions (original) (raw)
David Jones via llvm-dev llvm-dev at lists.llvm.org
Wed Feb 13 13:17:30 PST 2019
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I notice that no intrinsics have been defined for the CSRRW/CSRRS/CSRRC instructions.
It would be convenient to have intrinsics for these to allow CSR manipulation directly from IR code.
Interestingly, this seems to be true for PowerPC (no intrinsics for mfdcr/mtdcr) and X86 (no in/out) as well.
Are there plans to define standard RISCV intrinsics for this? -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20190213/d8f473a9/attachment.html>
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