[llvm-dev] Selection DAG chain question (original) (raw)

Hendrik Greving via llvm-dev llvm-dev at lists.llvm.org
Thu Jul 16 11:47:25 PDT 2020

Chain doesn't guarantee that operations on parallel chains don't get interleaved

This would be a sequential chain...

This is the case for all operations expanded as library calls

I think their originating node already has a chain (i.e. mem operand or side effect in llvm-ir). My case is a arithmetic node without ordering constraints (divrem) getting lowered into sth that does have ordering constraints. I first thought it is very straight forward, turns out it is not a common case. My current WA will be to code prepare into intrinsics with side-effects. I was wondering if that's really necessary..

Thanks for the input

On Thu, Jul 16, 2020 at 11:21 AM Matt Arsenault <arsenm2 at gmail.com> wrote:

On Jul 16, 2020, at 14:10, Hendrik Greving via llvm-dev <_ _llvm-dev at lists.llvm.org> wrote: I scanned other architectures, haven't found an example where somebody creates a chain out of thin air. Do you know any?

This is the case for all operations expanded as library calls. The call sequence involves a chain. One of the AMDGPU fdiv expansions also introduces a side effecting mode switch with a chain -Matt -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20200716/8fb7fe99/attachment.html>

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