[llvm-dev] RISC-V LLVM sync-up call 19th August 2021 (original) (raw)
Alex Bradbury via llvm-dev llvm-dev at lists.llvm.org
Thu Aug 19 05:02:11 PDT 2021
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For background on these calls, see <http://lists.llvm.org/pipermail/llvm-dev/2019-September/135087.html>.
Reminder: the purpose is to coordinate between active contributors. If you have support questions etc then it's best to post to llvm-dev.
We have a call every alternate Thursday at 4pm BST, via <https://meet.google.com/ske-zcog-spp>. If you have topics to discuss, please email me ahead of time and I can add them to the agenda.
We have a shared calendar that may help in keeping track, which is accessible at:
- <https://calendar.google.com/calendar/b/1?cid=bG93cmlzYy5vcmdfMG41cGtlc2ZqY25wMGJoNWhwczFwMGJkODBAZ3JvdXAuY2FsZW5kYXIuZ29vZ2xlLmNvbQ>
- <https://calendar.google.com/calendar/ical/lowrisc.org_0n5pkesfjcnp0bh5hps1p0bd80%40group.calendar.google.com/public/basic.ics>
Agenda:
- LLVM 13.0 - any pending backport requests (bugfixes etc)?
- Standing of RVV v1.0-rc changes (ref: https://reviews.llvm.org/D105690#2925485) - checking we're aligned on how to handle this
- Unify arch string parsing logic to RISCVISAInfo <https://reviews.llvm.org/D105168>
- Encoding arch information in a new riscv-isa-features module flag <https://reviews.llvm.org/D106347>
- Proposal to add .option arch <https://github.com/riscv/riscv-asm-manual/pull/67>
- Heads up on other RISC-V standards related PRs/issues. Many thanks
to Luís Marques for collecting these. We won't walk through them in
the meeting, I'll just ask if there are any that someone wants to draw
particular attention to or discuss.
- Describe the behaviour of the linker for ABI mismatches <https://github.com/riscv/riscv-toolchain-conventions/pull/15>
- Add option to specify version of privilege and debug spec <https://github.com/riscv/riscv-toolchain-conventions/pull/16>
- Add new bind_now directive <https://github.com/riscv/riscv-asm-manual/pull/64>
- Add mapping symbol <https://github.com/riscv/riscv-elf-psabi-doc/pull/196>
- Add lga pseudo-instructions <https://github.com/riscv/riscv-asm-manual/pull/69>
- Add new RVV macros <https://github.com/riscv/riscv-c-api-doc/pull/21>
- Define enum storage in the psABI <https://github.com/riscv/riscv-elf-psabi-doc/pull/209>
- AOB
Best,
Alex
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