[llvm-dev] Query: Association of SchecWriteRes to instruction via InstRW records (original) (raw)
Andrew Trick via llvm-dev llvm-dev at lists.llvm.org
Mon Aug 30 16:23:02 PDT 2021
- Previous message: [llvm-dev] Query: Association of SchecWriteRes to instruction via InstRW records
- Next message: [llvm-dev] LLVM buildmaster will be restarted tonight
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
Hi Sandeep,
On Aug 25, 2021, at 11:12 AM, Dasgupta, Sandeep via llvm-dev <llvm-dev at lists.llvm.org> wrote:
Hello Team, I have the following question relate to how to associate multiple SchedWriteRes with the same schedule model to a particular instruction.
Whenever changing the machine model, it's good to rerun the llvm-tblgen command with -debug-only=subtarget-emitter. That should give you a good idea of how all the definitions get expanded.
The generated AArch64GenSubtargetInfo.inc should have enough comments to grep the tables. But the encoding can be confusing.
The Tablegen subtarget emitter should diagnose ambiguity. But maybe that's not happening.
-Andy
-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20210830/4ba4b316/attachment.html>
- Previous message: [llvm-dev] Query: Association of SchecWriteRes to instruction via InstRW records
- Next message: [llvm-dev] LLVM buildmaster will be restarted tonight
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]