AMDGPU.h Source File (original) (raw)

10#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPU_H

11#define LLVM_LIB_TARGET_AMDGPU_AMDGPU_H

19namespace llvm {

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599 {true, true, false, true, true, true, true, true, true, true},

600 {true, true, false, false, true, false, true, true, true, true},

601 {false, false, true, false, false, false, false, false, false, false},

602 {true, false, false, true, false, false, false, false, false, false},

603 {true, true, false, false, false, false, true, true, true, true},

604 {true, false, false, false, false, true, false, false, false, false},

605 {true, true, false, false, true, false, false, true, true, true},

606 {true, true, false, false, true, false, true, true, true, true},

607 {true, true, false, false, true, false, true, true, true, true},

608 {true, true, false, false, true, false, true, true, true, true},

609 };

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613 return ASAliasRules[AS1][AS2];

614}

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620#endif

AMDGPU address space definition.

This header defines various interfaces for pass management in LLVM.

ModuleAnalysisManager MAM

AMDGPUAnnotateUniformValuesPass()=default

PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)

PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)

AMDGPUAttributorPass(TargetMachine &TM, AMDGPUAttributorOptions Options, ThinOrFullLTOPhase LTOPhase=ThinOrFullLTOPhase::None)

Definition AMDGPU.h:364

PreservedAnalyses run(Function &, FunctionAnalysisManager &)

AMDGPUCodeGenPreparePass(TargetMachine &TM)

Definition AMDGPU.h:327

AMDGPULateCodeGenPreparePass(const GCNTargetMachine &TM)

Definition AMDGPU.h:337

PreservedAnalyses run(Function &, FunctionAnalysisManager &)

AMDGPULowerKernelArgumentsPass(TargetMachine &TM)

Definition AMDGPU.h:347

PreservedAnalyses run(Function &, FunctionAnalysisManager &)

PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &AM)

AMDGPUPreloadKernelArgumentsPass(const TargetMachine &TM)

Definition AMDGPU.h:375

PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)

PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)

AMDGPURewriteAGPRCopyMFMAPass()=default

PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)

AMDGPURewriteUndefForPHIPass()=default

PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)

FunctionPass class - This class is used to implement most global optimizations.

PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &AM)

ImmutablePass class - This class is used to provide information that does not need to be run.

ModulePass class - This class is used to implement unstructured interprocedural optimizations and ana...

A Module instance is used to store all the information related to an LLVM module.

PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...

Pass interface - Implemented by all 'passes'.

A set of analyses that are preserved following a run of a transformation pass.

SIAnnotateControlFlowPass(const AMDGPUTargetMachine &TM)

Definition AMDGPU.h:497

PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)

PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)

static bool isRequired()

Definition AMDGPU.h:417

PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)

static bool isRequired()

Definition AMDGPU.h:431

PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)

SILowerI1CopiesPass()=default

PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)

static bool isRequired()

Definition AMDGPU.h:397

SIModeRegisterPass()=default

PreservedAnalyses run(MachineFunction &F, MachineFunctionAnalysisManager &AM)

PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)

static bool isRequired()

Definition AMDGPU.h:438

Primary interface to the complete machine description for the target machine.

static bool addrspacesMayAlias(unsigned AS1, unsigned AS2)

Definition AMDGPU.h:592

TargetIndex

Definition AMDGPU.h:584

@ TI_SCRATCH_RSRC_DWORD1

Definition AMDGPU.h:587

@ TI_SCRATCH_RSRC_DWORD3

Definition AMDGPU.h:589

@ TI_SCRATCH_RSRC_DWORD0

Definition AMDGPU.h:586

@ TI_SCRATCH_RSRC_DWORD2

Definition AMDGPU.h:588

@ TI_CONSTDATA_START

Definition AMDGPU.h:585

This is an optimization pass for GlobalISel generic memory operations.

ScanOptions

Definition AMDGPU.h:104

@ DPP

Definition AMDGPU.h:104

@ Iterative

Definition AMDGPU.h:104

ImmutablePass * createAMDGPUAAWrapperPass()

char & SIAnnotateControlFlowLegacyPassID

FunctionPass * createAMDGPUSetWavePriorityPass()

char & AMDGPUCtorDtorLoweringLegacyPassID

void initializeAMDGPUMarkLastScratchLoadLegacyPass(PassRegistry &)

void initializeAMDGPUInsertDelayAluLegacyPass(PassRegistry &)

char & AMDGPUPreloadKernArgPrologLegacyID

char & AMDGPUExportKernelRuntimeHandlesLegacyID

void initializeSIOptimizeExecMaskingPreRALegacyPass(PassRegistry &)

char & GCNPreRAOptimizationsID

void initializeSIInsertHardClausesLegacyPass(PassRegistry &)

char & SIMemoryLegalizerID

FunctionPass * createSIFormMemoryClausesLegacyPass()

FunctionPass * createSIAnnotateControlFlowLegacyPass()

Create the annotation pass.

FunctionPass * createSIModeRegisterPass()

void initializeGCNPreRAOptimizationsLegacyPass(PassRegistry &)

void initializeSILowerWWMCopiesLegacyPass(PassRegistry &)

void initializeAMDGPUAAWrapperPassPass(PassRegistry &)

void initializeSIShrinkInstructionsLegacyPass(PassRegistry &)

ModulePass * createAMDGPULowerBufferFatPointersPass()

char & SIShrinkInstructionsLegacyID

ModulePass * createAMDGPUCtorDtorLoweringLegacyPass()

char & AMDGPUImageIntrinsicOptimizerID

ModulePass * createAMDGPUSwLowerLDSLegacyPass(const AMDGPUTargetMachine *TM=nullptr)

void initializeGCNRewritePartialRegUsesLegacyPass(llvm::PassRegistry &)

void initializeAMDGPURewriteUndefForPHILegacyPass(PassRegistry &)

char & AMDGPULowerExecSyncLegacyPassID

char & AMDGPUPromoteKernelArgumentsID

char & GCNRewritePartialRegUsesID

void initializeAMDGPUSetWavePriorityLegacyPass(PassRegistry &)

void initializeAMDGPUSwLowerLDSLegacyPass(PassRegistry &)

void initializeAMDGPULowerVGPREncodingLegacyPass(PassRegistry &)

FunctionPass * createAMDGPURewriteOutArgumentsPass()

char & AMDGPUWaitSGPRHazardsLegacyID

void initializeSILowerSGPRSpillsLegacyPass(PassRegistry &)

char & AMDGPUResourceUsageAnalysisID

void initializeAMDGPUDAGToDAGISelLegacyPass(PassRegistry &)

FunctionPass * createAMDGPURegBankCombiner(bool IsOptNone)

char & AMDGPUReserveWWMRegsLegacyID

void initializeAMDGPUWaitSGPRHazardsLegacyPass(PassRegistry &)

char & SIOptimizeExecMaskingLegacyID

FunctionPass * createSILoadStoreOptimizerLegacyPass()

ModulePass * createAMDGPULowerKernelAttributesPass()

ModulePass * createAMDGPUExportKernelRuntimeHandlesLegacyPass()

ModulePass * createAMDGPUAlwaysInlinePass(bool GlobalOpt=true)

AnalysisManager< MachineFunction > MachineFunctionAnalysisManager

void initializeAMDGPUAsmPrinterPass(PassRegistry &)

void initializeSIFoldOperandsLegacyPass(PassRegistry &)

char & SILoadStoreOptimizerLegacyID

void initializeAMDGPUGlobalISelDivergenceLoweringPass(PassRegistry &)

FunctionPass * createSIPeepholeSDWALegacyPass()

char & SIFormMemoryClausesID

char & AMDGPURemoveIncompatibleFunctionsID

void initializeSILoadStoreOptimizerLegacyPass(PassRegistry &)

void initializeAMDGPULowerModuleLDSLegacyPass(PassRegistry &)

void initializeAMDGPUCtorDtorLoweringLegacyPass(PassRegistry &)

FunctionPass * createAMDGPUUniformIntrinsicCombineLegacyPass()

void initializeAMDGPURegBankCombinerPass(PassRegistry &)

char & AMDGPUGlobalISelDivergenceLoweringID

FunctionPass * createSIFoldOperandsLegacyPass()

ThinOrFullLTOPhase

This enumerates the LLVM full LTO or ThinLTO optimization phases.

@ None

No LTO/ThinLTO behavior needed.

char & AMDGPUUnifyDivergentExitNodesID

void initializeAMDGPUPrepareAGPRAllocLegacyPass(PassRegistry &)

char & SIInsertWaitcntsID

FunctionPass * createAMDGPUAtomicOptimizerPass(ScanOptions ScanStrategy)

FunctionPass * createAMDGPUPreloadKernArgPrologLegacyPass()

char & AMDGPUPrintfRuntimeBindingID

char & SIOptimizeVGPRLiveRangeLegacyID

void initializeAMDGPURewriteOutArgumentsPass(PassRegistry &)

void initializeAMDGPUExternalAAWrapperPass(PassRegistry &)

void initializeAMDGPULowerKernelArgumentsPass(PassRegistry &)

void initializeSIModeRegisterLegacyPass(PassRegistry &)

void initializeAMDGPUPreloadKernelArgumentsLegacyPass(PassRegistry &)

char & SILateBranchLoweringPassID

char & AMDGPUSwLowerLDSLegacyPassID

void initializeSIMemoryLegalizerLegacyPass(PassRegistry &)

ModulePass * createAMDGPULowerIntrinsicsLegacyPass()

char & GCNDPPCombineLegacyID

FunctionPass * createAMDGPULowerKernelArgumentsPass()

char & AMDGPUInsertDelayAluID

void initializeGCNPreRALongBranchRegLegacyPass(PassRegistry &)

char & SILowerWWMCopiesLegacyID

char & SIOptimizeExecMaskingPreRAID

char & AMDGPULowerModuleLDSLegacyPassID

FunctionPass * createSIPostRABundlerPass()

void initializeAMDGPULowerExecSyncLegacyPass(PassRegistry &)

void initializeAMDGPUPostLegalizerCombinerPass(PassRegistry &)

void initializeAMDGPUExportKernelRuntimeHandlesLegacyPass(PassRegistry &)

FunctionPass * createSIPreAllocateWWMRegsLegacyPass()

Pass * createAMDGPUStructurizeCFGPass()

CodeGenOptLevel

Code generation optimization level.

char & AMDGPULowerBufferFatPointersID

void initializeSIInsertWaitcntsLegacyPass(PassRegistry &)

char & AMDGPURegBankSelectID

ModulePass * createAMDGPUPreloadKernelArgumentsLegacyPass(const TargetMachine *)

ModulePass * createAMDGPUPrintfRuntimeBinding()

void initializeAMDGPUImageIntrinsicOptimizerPass(PassRegistry &)

void initializeSILateBranchLoweringLegacyPass(PassRegistry &)

void initializeSILowerControlFlowLegacyPass(PassRegistry &)

void initializeSIFormMemoryClausesLegacyPass(PassRegistry &)

char & SIPreAllocateWWMRegsLegacyID

ModulePass * createAMDGPULowerModuleLDSLegacyPass(const AMDGPUTargetMachine *TM=nullptr)

void initializeAMDGPUPreLegalizerCombinerPass(PassRegistry &)

FunctionPass * createAMDGPUPromoteAlloca()

void initializeAMDGPUArgumentUsageInfoWrapperLegacyPass(PassRegistry &)

void initializeAMDGPUReserveWWMRegsLegacyPass(PassRegistry &)

char & SIPreEmitPeepholeID

char & SIPostRABundlerLegacyID

ModulePass * createAMDGPURemoveIncompatibleFunctionsPass(const TargetMachine *)

void initializeGCNRegPressurePrinterPass(PassRegistry &)

char & AMDGPURewriteOutArgumentsID

void initializeSILowerI1CopiesLegacyPass(PassRegistry &)

char & SILowerSGPRSpillsLegacyID

char & SILowerControlFlowLegacyID

FunctionPass * createAMDGPUCodeGenPreparePass()

void initializeSIAnnotateControlFlowLegacyPass(PassRegistry &)

FunctionPass * createAMDGPUReserveWWMRegsPass()

FunctionPass * createAMDGPUISelDag(TargetMachine &TM, CodeGenOptLevel OptLevel)

This pass converts a legalized DAG into a AMDGPU-specific.

void initializeGCNCreateVOPDLegacyPass(PassRegistry &)

void initializeAMDGPUUniformIntrinsicCombineLegacyPass(PassRegistry &)

void initializeSIPreAllocateWWMRegsLegacyPass(PassRegistry &)

void initializeSIFixVGPRCopiesLegacyPass(PassRegistry &)

void initializeSIFixSGPRCopiesLegacyPass(PassRegistry &)

char & AMDGPUAnnotateUniformValuesLegacyPassID

void initializeAMDGPUAtomicOptimizerPass(PassRegistry &)

void initializeAMDGPULowerIntrinsicsLegacyPass(PassRegistry &)

FunctionPass * createGCNPreRAOptimizationsLegacyPass()

void initializeAMDGPURewriteAGPRCopyMFMALegacyPass(PassRegistry &)

char & AMDGPULowerKernelAttributesID

char & AMDGPUUniformIntrinsicCombineLegacyPassID

void initializeSIPostRABundlerLegacyPass(PassRegistry &)

FunctionPass * createAMDGPURegBankSelectPass()

FunctionPass * createSIWholeQuadModeLegacyPass()

char & GCNRegPressurePrinterID

FunctionPass * createAMDGPURegBankLegalizePass()

FunctionPass * createSIOptimizeVGPRLiveRangeLegacyPass()

ImmutablePass * createAMDGPUExternalAAWrapperPass()

void initializeAMDGPUCodeGenPreparePass(PassRegistry &)

FunctionPass * createAMDGPURewriteUndefForPHILegacyPass()

void initializeSIOptimizeExecMaskingLegacyPass(PassRegistry &)

FunctionPass * createSILowerI1CopiesLegacyPass()

char & AMDGPULateCodeGenPrepareLegacyID

FunctionPass * createAMDGPUPostLegalizeCombiner(bool IsOptNone)

void initializeAMDGPULowerKernelAttributesPass(PassRegistry &)

char & SIInsertHardClausesID

char & SIFixSGPRCopiesLegacyID

void initializeGCNDPPCombineLegacyPass(PassRegistry &)

char & SIPeepholeSDWALegacyID

char & SIFoldOperandsLegacyID

void initializeGCNNSAReassignLegacyPass(PassRegistry &)

char & AMDGPUPrepareAGPRAllocLegacyID

char & AMDGPUAtomicOptimizerID

char & SILowerI1CopiesLegacyID

void initializeAMDGPUPreloadKernArgPrologLegacyPass(PassRegistry &)

FunctionPass * createLowerWWMCopiesPass()

char & AMDGPURewriteAGPRCopyMFMALegacyID

ModulePass * createAMDGPULowerExecSyncLegacyPass()

char & AMDGPUPromoteAllocaID

char & AMDGPULowerVGPREncodingLegacyID

FunctionPass * createAMDGPUGlobalISelDivergenceLoweringPass()

FunctionPass * createSIMemoryLegalizerPass()

void initializeAMDGPULateCodeGenPrepareLegacyPass(PassRegistry &)

void initializeSIOptimizeVGPRLiveRangeLegacyPass(PassRegistry &)

void initializeSIPeepholeSDWALegacyPass(PassRegistry &)

char & AMDGPURegBankLegalizeID

void initializeAMDGPURegBankLegalizePass(PassRegistry &)

AnalysisManager< Function > FunctionAnalysisManager

Convenience typedef for the Function analysis manager.

FunctionPass * createAMDGPUPreLegalizeCombiner(bool IsOptNone)

void initializeAMDGPURegBankSelectPass(PassRegistry &)

FunctionPass * createAMDGPULateCodeGenPrepareLegacyPass()

char & AMDGPURewriteUndefForPHILegacyPassID

FunctionPass * createAMDGPUImageIntrinsicOptimizerPass(const TargetMachine *)

void initializeAMDGPUUnifyDivergentExitNodesPass(PassRegistry &)

void initializeAMDGPULowerBufferFatPointersPass(PassRegistry &)

FunctionPass * createSIInsertWaitcntsPass()

FunctionPass * createAMDGPUAnnotateUniformValuesLegacy()

void initializeSIWholeQuadModeLegacyPass(PassRegistry &)

FunctionPass * createSIOptimizeExecMaskingPreRAPass()

FunctionPass * createGCNDPPCombinePass()

void initializeAMDGPUResourceUsageAnalysisWrapperPassPass(PassRegistry &)

FunctionPass * createSIShrinkInstructionsLegacyPass()

char & AMDGPUMarkLastScratchLoadID

char & AMDGPUPreloadKernelArgumentsLegacyID

void initializeAMDGPUAnnotateUniformValuesLegacyPass(PassRegistry &)

void initializeAMDGPUPrintfRuntimeBindingPass(PassRegistry &)

void initializeAMDGPUPromoteAllocaPass(PassRegistry &)

void initializeAMDGPURemoveIncompatibleFunctionsLegacyPass(PassRegistry &)

FunctionPass * createSIFixControlFlowLiveIntervalsPass()

char & AMDGPULowerKernelArgumentsID

void initializeAMDGPUAlwaysInlinePass(PassRegistry &)

char & AMDGPUCodeGenPrepareID

FunctionPass * createSIFixSGPRCopiesLegacyPass()

void initializeSIPreEmitPeepholeLegacyPass(PassRegistry &)

AnalysisManager< Module > ModuleAnalysisManager

Convenience typedef for the Module analysis manager.

char & AMDGPUPerfHintAnalysisLegacyID

FunctionPass * createAMDGPUPromoteKernelArgumentsPass()

char & GCNPreRALongBranchRegID

void initializeAMDGPUPerfHintAnalysisLegacyPass(PassRegistry &)

void initializeAMDGPUPromoteKernelArgumentsPass(PassRegistry &)

AMDGPUAlwaysInlinePass(bool GlobalOpt=true)

Definition AMDGPU.h:294

PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)

PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)

AMDGPUAtomicOptimizerPass(TargetMachine &TM, ScanOptions ScanImpl)

Definition AMDGPU.h:274

bool IsClosedWorld

Definition AMDGPU.h:352

PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)

AMDGPUImageIntrinsicOptimizerPass(TargetMachine &TM)

Definition AMDGPU.h:78

PreservedAnalyses run(MachineFunction &F, MachineFunctionAnalysisManager &MFAM)

PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)

AMDGPULowerBufferFatPointersPass(const TargetMachine &TM)

Definition AMDGPU.h:150

PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)

AMDGPULowerExecSyncPass()

Definition AMDGPU.h:306

PreservedAnalyses run(Module &M, ModuleAnalysisManager &MAM)

AMDGPULowerIntrinsicsPass(const AMDGPUTargetMachine &TM)

Definition AMDGPU.h:160

PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)

PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)

AMDGPULowerModuleLDSPass(const AMDGPUTargetMachine &TM_)

Definition AMDGPU.h:140

const AMDGPUTargetMachine & TM

Definition AMDGPU.h:139

PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)

AMDGPUSimplifyLibCallsPass()=default

PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)

const AMDGPUTargetMachine & TM

Definition AMDGPU.h:316

PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)

AMDGPUSwLowerLDSPass(const AMDGPUTargetMachine &TM_)

Definition AMDGPU.h:317

PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)

A CRTP mix-in to automatically provide informational APIs needed for passes.