AMDGPUArgumentUsageInfo.cpp Source File (original) (raw)

18using namespace llvm;

20#define DEBUG_TYPE "amdgpu-argument-reg-usage-info"

23 "Argument Register Usage Information Storage", false, true)

27 if (!isSet()) {

28 OS << "\n";

29 return;

30 }

32 if (isRegister())

33 OS << "Reg " << printReg(getRegister(), TRI);

34 else

35 OS << "Stack offset " << getStackOffset();

37 if (isMasked()) {

38 OS << " & ";

40 }

42 OS << '\n';

43}

55 for (const auto &FI : ArgInfoMap) {

56 OS << "Arguments for " << FI.first->getName() << '\n'

57 << " PrivateSegmentBuffer: " << FI.second.PrivateSegmentBuffer

58 << " DispatchPtr: " << FI.second.DispatchPtr

59 << " QueuePtr: " << FI.second.QueuePtr

60 << " KernargSegmentPtr: " << FI.second.KernargSegmentPtr

61 << " DispatchID: " << FI.second.DispatchID

62 << " FlatScratchInit: " << FI.second.FlatScratchInit

63 << " PrivateSegmentSize: " << FI.second.PrivateSegmentSize

64 << " WorkGroupIDX: " << FI.second.WorkGroupIDX

65 << " WorkGroupIDY: " << FI.second.WorkGroupIDY

66 << " WorkGroupIDZ: " << FI.second.WorkGroupIDZ

67 << " WorkGroupInfo: " << FI.second.WorkGroupInfo

68 << " LDSKernelId: " << FI.second.LDSKernelId

69 << " PrivateSegmentWaveByteOffset: "

70 << FI.second.PrivateSegmentWaveByteOffset

71 << " ImplicitBufferPtr: " << FI.second.ImplicitBufferPtr

72 << " ImplicitArgPtr: " << FI.second.ImplicitArgPtr

73 << " WorkItemIDX " << FI.second.WorkItemIDX

74 << " WorkItemIDY " << FI.second.WorkItemIDY

75 << " WorkItemIDZ " << FI.second.WorkItemIDZ

76 << '\n';

77 }

78}

81 ModuleAnalysisManager::Invalidator &) {

83 return !PAC.preservedWhenStateless();

84}

86std::tuple<const ArgDescriptor *, const TargetRegisterClass *, LLT>

93 }

96 &AMDGPU::SGPR_64RegClass,

100 &AMDGPU::SGPR_32RegClass, LLT::scalar(32));

103 &AMDGPU::SGPR_32RegClass, LLT::scalar(32));

106 &AMDGPU::SGPR_32RegClass, LLT::scalar(32));

114 return std::tuple(nullptr, &AMDGPU::SGPR_32RegClass, LLT::scalar(32));

117 &AMDGPU::SGPR_32RegClass, LLT::scalar(32));

119 return std::tuple(

121 &AMDGPU::SGPR_32RegClass, LLT::scalar(32));

124 &AMDGPU::SGPR_32RegClass, LLT::scalar(32)};

127 &AMDGPU::SGPR_64RegClass,

131 &AMDGPU::SGPR_64RegClass,

135 &AMDGPU::SGPR_64RegClass, LLT::scalar(64));

138 &AMDGPU::SGPR_64RegClass, LLT::scalar(64));

141 &AMDGPU::SGPR_64RegClass,

144 return std::tuple(QueuePtr ? &QueuePtr : nullptr, &AMDGPU::SGPR_64RegClass,

148 &AMDGPU::VGPR_32RegClass, LLT::scalar(32));

151 &AMDGPU::VGPR_32RegClass, LLT::scalar(32));

154 &AMDGPU::VGPR_32RegClass, LLT::scalar(32));

155 }

157}

158

165

166

167

170

171

176

177 const unsigned Mask = 0x3ff;

181 return AI;

182}

183

186 auto I = ArgInfoMap.find(&F);

187 if (I == ArgInfoMap.end())

189 return I->second;

190}

191

192AnalysisKey AMDGPUArgumentUsageAnalysis::Key;

193

Provides AMDGPU specific target descriptions.

static void print(raw_ostream &Out, object::Archive::Kind Kind, T Val)

#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)

Interface definition for SIRegisterInfo.

AMDGPUArgumentUsageInfo run(Module &M, ModuleAnalysisManager &)

Definition AMDGPUArgumentUsageInfo.cpp:195

static const AMDGPUFunctionArgInfo ExternFunctionInfo

static const AMDGPUFunctionArgInfo FixedABIFunctionInfo

const AMDGPUFunctionArgInfo & lookupFuncArgInfo(const Function &F) const

Definition AMDGPUArgumentUsageInfo.cpp:185

void print(raw_ostream &OS, const Module *M=nullptr) const

Definition AMDGPUArgumentUsageInfo.cpp:54

bool invalidate(Module &M, const PreservedAnalyses &PA, ModuleAnalysisManager::Invalidator &Inv)

Definition AMDGPUArgumentUsageInfo.cpp:80

static constexpr LLT scalar(unsigned SizeInBits)

Get a low-level scalar or aggregate "bag of bits".

static constexpr LLT pointer(unsigned AddressSpace, unsigned SizeInBits)

Get a low-level pointer in the given address space.

static constexpr LLT fixed_vector(unsigned NumElements, unsigned ScalarSizeInBits)

Get a low-level fixed-width vector of some number of elements and element width.

A Module instance is used to store all the information related to an LLVM module.

A set of analyses that are preserved following a run of a transformation pass.

PreservedAnalysisChecker getChecker() const

Build a checker for this PreservedAnalyses and the specified analysis type.

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

LLVM Value Representation.

This class implements an extremely fast bulk output stream that can only output to a stream.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

@ CONSTANT_ADDRESS

Address space for constant memory (VTX2).

This is an optimization pass for GlobalISel generic memory operations.

LLVM_ABI void write_hex(raw_ostream &S, uint64_t N, HexPrintStyle Style, std::optional< size_t > Width=std::nullopt)

LLVM_ABI Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)

Prints virtual and physical registers with or without a TRI instance.

AnalysisManager< Module > ModuleAnalysisManager

Convenience typedef for the Module analysis manager.

@ CLUSTER_WORKGROUP_MAX_ID_X

@ CLUSTER_WORKGROUP_MAX_ID_Z

@ CLUSTER_WORKGROUP_MAX_FLAT_ID

@ CLUSTER_WORKGROUP_MAX_ID_Y

@ PRIVATE_SEGMENT_WAVE_BYTE_OFFSET

ArgDescriptor PrivateSegmentBuffer

ArgDescriptor WorkGroupIDY

ArgDescriptor WorkGroupIDZ

ArgDescriptor PrivateSegmentSize

ArgDescriptor ImplicitArgPtr

ArgDescriptor PrivateSegmentWaveByteOffset

static AMDGPUFunctionArgInfo fixedABILayout()

Definition AMDGPUArgumentUsageInfo.cpp:159

ArgDescriptor WorkItemIDZ

ArgDescriptor WorkItemIDY

ArgDescriptor LDSKernelId

std::tuple< const ArgDescriptor *, const TargetRegisterClass *, LLT > getPreloadedValue(PreloadedValue Value) const

Definition AMDGPUArgumentUsageInfo.cpp:87

ArgDescriptor KernargSegmentPtr

ArgDescriptor WorkItemIDX

ArgDescriptor FlatScratchInit

ArgDescriptor DispatchPtr

ArgDescriptor ImplicitBufferPtr

ArgDescriptor WorkGroupIDX

A special type used by analysis passes to provide an address that identifies that particular analysis...

static ArgDescriptor createRegister(Register Reg, unsigned Mask=~0u)