LLVM: lib/Target/AMDGPU/AMDGPUBarrierLatency.cpp Source File (original) (raw)

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

24

25using namespace llvm;

26

27namespace {

28

30private:

31 SmallSet<SyncScope::ID, 4> IgnoredScopes;

32

33public:

34 BarrierLatency(MachineFunction *MF) {

37 IgnoredScopes.insert(Context.getOrInsertSyncScopeID("wavefront"));

38 IgnoredScopes.insert(Context.getOrInsertSyncScopeID("wavefront-one-as"));

39 IgnoredScopes.insert(Context.getOrInsertSyncScopeID("singlethread-one-as"));

40 }

41 void apply(ScheduleDAGInstrs *DAG) override;

42};

43

45 constexpr unsigned SyntheticLatency = 2000;

46 for (SUnit &SU : DAG->SUnits) {

47 const MachineInstr *MI = SU.getInstr();

48 if (MI->getOpcode() != AMDGPU::ATOMIC_FENCE)

49 continue;

50

51

52

54 if (IgnoredScopes.contains(SSID))

55 continue;

56

57 for (SDep &PredDep : SU.Preds) {

59 continue;

60 SUnit *PredSU = PredDep.getSUnit();

61 MachineInstr *MI = PredSU->getInstr();

62

63 if (MI->mayLoad() || MI->mayStore())

64 continue;

65 SDep ForwardD = PredDep;

67 for (SDep &SuccDep : PredSU->Succs) {

68 if (SuccDep == ForwardD) {

70 break;

71 }

72 }

76 }

77 }

78}

79

80}

81

82std::unique_ptr

84 return std::make_unique(MF);

85}

Provides AMDGPU specific target descriptions.

Interface definition for SIInstrInfo.

LLVMContext & getContext() const

getContext - Return a reference to the LLVMContext associated with this function.

Function & getFunction()

Return the LLVM function that this machine code represents.

void setLatency(unsigned Lat)

Sets the latency for this edge.

unsigned getLatency() const

Returns the latency value for this edge, which roughly means the minimum number of cycles that must e...

bool isBarrier() const

Tests if this is an Order dependence that is marked as a barrier.

SmallVector< SDep, 4 > Succs

All sunit successors.

LLVM_ABI void setDepthDirty()

Sets a flag in this node to indicate that its stored Depth value will require recomputation the next ...

SmallVector< SDep, 4 > Preds

All sunit predecessors.

MachineInstr * getInstr() const

Returns the representative MachineInstr for this SUnit.

A ScheduleDAG for scheduling lists of MachineInstr.

Mutate the DAG as a postpass after normal DAG building.

std::vector< SUnit > SUnits

The scheduling units.

bool contains(const T &V) const

Check if the SmallSet contains the given element.

@ SingleThread

Synchronized with respect to signal handlers executing in the same thread.

void apply(Opt *O, const Mod &M, const Mods &... Ms)

This is an optimization pass for GlobalISel generic memory operations.

std::unique_ptr< ScheduleDAGMutation > createAMDGPUBarrierLatencyDAGMutation(MachineFunction *MF)

Definition AMDGPUBarrierLatency.cpp:83

MachineInstr * getImm(const MachineOperand &MO, const MachineRegisterInfo *MRI)