AMDGPUCallLowering.h Source File (original) (raw)

14#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUCALLLOWERING_H

15#define LLVM_LIB_TARGET_AMDGPU_AMDGPUCALLLOWERING_H

19namespace llvm {

31 Align Alignment) const;

35 bool IsVarArg) const override;

43public:

59 SmallVectorImpl<std::pair<MCRegister, Register>> &ArgRegs,

62 bool

67 bool

72 bool

82 ArrayRef<std::pair<MCRegister, Register>> ImplicitArgRegs) const;

93};

94}

95#endif

static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")

Analysis containing CSE Info

This file describes how to lower LLVM calls to machine code calls.

bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info, SmallVectorImpl< ArgInfo > &OutArgs) const

bool isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info, SmallVectorImpl< ArgInfo > &InArgs, SmallVectorImpl< ArgInfo > &OutArgs) const

Returns true if the call can be lowered as a tail call.

bool lowerFormalArgumentsKernel(MachineIRBuilder &B, const Function &F, ArrayRef< ArrayRef< Register > > VRegs) const

bool lowerReturn(MachineIRBuilder &B, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI) const override

This hook behaves as the extended lowerReturn function, but for targets that do not support swifterro...

static CCAssignFn * CCAssignFnForCall(CallingConv::ID CC, bool IsVarArg)

void handleImplicitCallArguments(MachineIRBuilder &MIRBuilder, MachineInstrBuilder &CallInst, const GCNSubtarget &ST, const SIMachineFunctionInfo &MFI, CallingConv::ID CalleeCC, ArrayRef< std::pair< MCRegister, Register > > ImplicitArgRegs) const

static CCAssignFn * CCAssignFnForReturn(CallingConv::ID CC, bool IsVarArg)

bool areCalleeOutgoingArgsTailCallable(CallLoweringInfo &Info, MachineFunction &MF, SmallVectorImpl< ArgInfo > &OutArgs) const

bool lowerChainCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const

Lower a call to the @llvm.amdgcn.cs.chain intrinsic.

AMDGPUCallLowering(const AMDGPUTargetLowering &TLI)

bool passSpecialInputs(MachineIRBuilder &MIRBuilder, CCState &CCInfo, SmallVectorImpl< std::pair< MCRegister, Register > > &ArgRegs, CallLoweringInfo &Info) const

bool lowerFormalArguments(MachineIRBuilder &B, const Function &F, ArrayRef< ArrayRef< Register > > VRegs, FunctionLoweringInfo &FLI) const override

This hook must be implemented to lower the incoming (formal) arguments, described by VRegs,...

bool lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const override

This hook must be implemented to lower the given call instruction, including argument and return valu...

bool doCallerAndCalleePassArgsTheSameWay(CallLoweringInfo &Info, MachineFunction &MF, SmallVectorImpl< ArgInfo > &InArgs) const

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

CCState - This class holds information needed while lowering arguments and return values.

This class represents a function call, abstracting a target machine's calling convention.

CallLowering(const TargetLowering *TLI)

FunctionLoweringInfo - This contains information that is global to a function that is used when lower...

Helper class to build MachineInstr.

Wrapper class representing virtual and physical registers.

This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which inter...

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

LLVM Value Representation.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

This is an optimization pass for GlobalISel generic memory operations.

bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State)

CCAssignFn - This function assigns a location for Val, updating State to reflect the change.

This struct is a compact representation of a valid (non-zero power of two) alignment.