LLVM: lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp File Reference (original) (raw)
GlobalISel pass that selects divergent i1 phis as lane mask phis. More...
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| Macros | |
|---|---|
| #define | DEBUG_TYPE "amdgpu-global-isel-divergence-lowering" |
| Functions |
|---|
| Variables | |
|---|---|
| DEBUG_TYPE | |
| AMDGPU GlobalISel divergence | lowering |
| AMDGPU GlobalISel divergence | false |
Detailed Description
GlobalISel pass that selects divergent i1 phis as lane mask phis.
Lane mask merging uses same algorithm as SDAG in SILowerI1Copies. Handles all cases of temporal divergence. For divergent non-phi i1 and uniform i1 uses outside of the cycle this pass currently depends on LCSSA to insert phis with one incoming.
Definition in file AMDGPUGlobalISelDivergenceLowering.cpp.
Macro Definition Documentation
◆ DEBUG_TYPE
#define DEBUG_TYPE "amdgpu-global-isel-divergence-lowering"
Function Documentation
◆ INITIALIZE_PASS_BEGIN()
| INITIALIZE_PASS_BEGIN | ( | AMDGPUGlobalISelDivergenceLowering | , |
|---|---|---|---|
| DEBUG_TYPE | , | ||
| "AMDGPU GlobalISel divergence lowering" | , | ||
| false | , | ||
| false | ) |
Variable Documentation
◆ DEBUG_TYPE
◆ false
AMDGPU GlobalISel divergence false
◆ lowering
AMDGPU GlobalISel divergence lowering