ARCExpandPseudos.cpp Source File (original) (raw)

22using namespace llvm;

24#define DEBUG_TYPE "arc-expand-pseudos"

26namespace {

29public:

30 static char ID;

35 StringRef getPassName() const override { return "ARC Expand Pseudos"; }

37private:

43};

45char ARCExpandPseudos::ID = 0;

47}

50 switch (PseudoOp) {

51 case ARC::ST_FAR:

52 return ARC::ST_rs9;

53 case ARC::STH_FAR:

54 return ARC::STH_rs9;

55 case ARC::STB_FAR:

56 return ARC::STB_rs9;

57 default:

59 }

60}

64 MachineInstr &SI = *SII;

67 isUInt<6>(SI.getOperand(2).getImm()) ? ARC::ADD_rru6 : ARC::ADD_rrlimm;

68 BuildMI(*SI.getParent(), SI, SI.getDebugLoc(), TII->get(AddOpc), AddrReg)

69 .addReg(SI.getOperand(1).getReg())

70 .addImm(SI.getOperand(2).getImm());

71 BuildMI(*SI.getParent(), SI, SI.getDebugLoc(),

73 .addReg(SI.getOperand(0).getReg())

76 SI.eraseFromParent();

77}

79void ARCExpandPseudos::expandCTLZ(MachineFunction &MF,

87 MachineInstr &MI = *MII;

88 const MachineOperand &Dest = MI.getOperand(0);

89 const MachineOperand &Src = MI.getOperand(1);

93 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(ARC::FLS_f_rr), Ra)

94 .add(Src);

95 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(ARC::MOV_cc_ru6), Rb)

99 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(ARC::RSUB_cc_rru6))

100 .add(Dest)

104

105 MI.eraseFromParent();

106}

107

108void ARCExpandPseudos::expandCTTZ(MachineFunction &MF,

110

111

112

113

114

115 MachineInstr &MI = *MII;

116 const MachineOperand &Dest = MI.getOperand(0);

117 const MachineOperand &Src = MI.getOperand(1);

119

120 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(ARC::FFS_f_rr), R)

121 .add(Src);

122 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(ARC::MOV_cc_ru6))

123 .add(Dest)

127

128 MI.eraseFromParent();

129}

130

131bool ARCExpandPseudos::runOnMachineFunction(MachineFunction &MF) {

132 const ARCSubtarget *STI = &MF.getSubtarget();

134 bool Expanded = false;

135 for (auto &MBB : MF) {

137 while (MBBI != E) {

139 switch (MBBI->getOpcode()) {

140 case ARC::ST_FAR:

141 case ARC::STH_FAR:

142 case ARC::STB_FAR:

143 expandStore(MF, MBBI);

144 Expanded = true;

145 break;

146 case ARC::CTLZ:

147 expandCTLZ(MF, MBBI);

148 Expanded = true;

149 break;

150 case ARC::CTTZ:

151 expandCTTZ(MF, MBBI);

152 Expanded = true;

153 break;

154 default:

155 break;

156 }

157 MBBI = NMBBI;

158 }

159 }

160 return Expanded;

161}

162

164 return new ARCExpandPseudos();

165}

const TargetInstrInfo & TII

static unsigned getMappedOp(unsigned PseudoOp)

Definition ARCExpandPseudos.cpp:49

MachineBasicBlock MachineBasicBlock::iterator MBBI

static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")

Promote Memory to Register

This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...

const ARCInstrInfo * getInstrInfo() const override

FunctionPass class - This class is used to implement most global optimizations.

const MCInstrDesc & get(unsigned Opcode) const

Return the machine instruction descriptor that corresponds to the specified instruction opcode.

MachineInstrBundleIterator< MachineInstr > iterator

MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

const MachineInstrBuilder & addImm(int64_t Val) const

Add a new immediate operand.

const MachineInstrBuilder & add(const MachineOperand &MO) const

const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const

Add a new virtual register operand.

LLVM_ABI Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")

createVirtualRegister - Create and return a new virtual register in the function with the specified r...

StringRef - Represent a constant reference to a string, i.e.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

This is an optimization pass for GlobalISel generic memory operations.

MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)

Builder interface. Specify how to create the initial instruction itself.

FunctionPass * createARCExpandPseudosPass()

Definition ARCExpandPseudos.cpp:163

constexpr bool isUInt(uint64_t x)

Checks if an unsigned integer fits into the given bit width.