ARMTargetMachine.h Source File (original) (raw)

13#ifndef LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H

14#define LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H

24#include

25#include

27namespace llvm {

30public:

33protected:

34 std::unique_ptr TLOF;

39 void reset() override;

41public:

44 std::optionalReloc::Model RM,

61 return TLOF.get();

62 }

100

103 return true;

104

105

106

107

110 return true;

111

112 return false;

113 }

114

121 SMRange &SourceRange) const override;

126};

127

128

129

131public:

134 std::optionalReloc::Model RM,

136 bool JIT);

137};

138

139

140

142public:

145 std::optionalReloc::Model RM,

147 bool JIT);

148};

149

150}

151

152#endif

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

This file defines the StringMap class.

This pass exposes codegen information to IR-level passes.

ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)

TargetLoweringObjectFile * getObjFileLowering() const override

Definition ARMTargetMachine.h:60

~ARMBaseTargetMachine() override

bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &, PerFunctionMIParsingState &PFS, SMDiagnostic &Error, SMRange &SourceRange) const override

Parse out the target's MachineFunctionInfo from the YAML reprsentation.

bool isTargetHardFloat() const

Definition ARMTargetMachine.h:79

bool isAAPCS_ABI() const

Definition ARMTargetMachine.h:69

std::unique_ptr< TargetLoweringObjectFile > TLOF

Definition ARMTargetMachine.h:34

ARM::ARMABI TargetABI

Definition ARMTargetMachine.h:31

bool isAPCS_ABI() const

Definition ARMTargetMachine.h:64

void reset() override

Reset internal state.

ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL)

Create an ARM architecture model.

MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override

Create the target's instance of MachineFunctionInfo.

bool isLittle

Definition ARMTargetMachine.h:35

bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override

Returns true if a cast between SrcAS and DestAS is a noop.

Definition ARMTargetMachine.h:96

bool isAAPCS16_ABI() const

Definition ARMTargetMachine.h:74

yaml::MachineFunctionInfo * createDefaultFuncInfoYAML() const override

Allocate and return a default initialized instance of the YAML representation for the MachineFunction...

bool targetSchedulesPostRAScheduling() const override

True if subtarget inserts the final scheduling pass on its own.

Definition ARMTargetMachine.h:89

bool isGVIndirectSymbol(const GlobalValue *GV) const

Definition ARMTargetMachine.h:101

TargetPassConfig * createPassConfig(PassManagerBase &PM) override

Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...

const ARMSubtarget * getSubtargetImpl() const =delete

ScheduleDAGInstrs * createMachineScheduler(MachineSchedContext *C) const override

Create an instance of ScheduleDAGInstrs to be run within the standard MachineScheduler pass for this ...

StringMap< std::unique_ptr< ARMSubtarget > > SubtargetMap

Definition ARMTargetMachine.h:36

bool isLittleEndian() const

Definition ARMTargetMachine.h:53

TargetTransformInfo getTargetTransformInfo(const Function &F) const override

Return a TargetTransformInfo for a given function.

ScheduleDAGInstrs * createPostMachineScheduler(MachineSchedContext *C) const override

Similar to createMachineScheduler but used when postRA machine scheduling is enabled.

yaml::MachineFunctionInfo * convertFuncInfoToYAML(const MachineFunction &MF) const override

Allocate and initialize an instance of the YAML representation of the MachineFunctionInfo.

ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)

CodeGenTargetMachineImpl(const Target &T, StringRef DataLayoutString, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOptLevel OL)

Lightweight error class with error context and mandatory checking.

bool isDeclarationForLinker() const

bool hasCommonLinkage() const

Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...

Represents a range in source code.

A ScheduleDAG for scheduling lists of MachineInstr.

StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...

StringRef - Represent a constant reference to a string, i.e.

Triple TargetTriple

Triple string, CPU name, and target feature strings the TargetMachine instance is created with.

bool isPositionIndependent() const

const Triple & getTargetTriple() const

bool shouldAssumeDSOLocal(const GlobalValue *GV) const

std::unique_ptr< const MCSubtargetInfo > STI

Target-Independent Code Generator Pass Configuration Options.

TargetSubtargetInfo - Generic base class for all target subtargets.

This pass provides access to the codegen interfaces that are needed for IR-level transformations.

Target - Wrapper for Target specific information.

Triple - Helper class for working with autoconf configuration names.

PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...

@ C

The default llvm calling convention, compatible with C.

This is an optimization pass for GlobalISel generic memory operations.

CodeGenOptLevel

Code generation optimization level.

BumpPtrAllocatorImpl<> BumpPtrAllocator

The standard BumpPtrAllocator which just uses the default template parameters.

MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...

MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...

Targets should override this in a way that mirrors the implementation of llvm::MachineFunctionInfo.