AVRAsmBackend.cpp Source File (original) (raw)

32using namespace llvm;

35 std::string Description, const MCFixup &Fixup,

38 std::string Diagnostic = "out of range " + Description;

40 int64_t Max = maxUIntN(Width);

42 Diagnostic +=

43 " (expected an integer in the range 0 to " + std::to_string(Max) + ")";

46 }

47}

58}

70 assert(STI && "STI can not be NULL");

73 const int32_t FlashSize = 0x2000;

74 int32_t SignedValue = Value;

80 Value = WrappedValue;

81 }

82 }

85 return false;

86 }

91 return true;

92}

103

104 auto top = Value & (0xf00000 << 6);

105 auto middle = Value & (0x1ffff << 5);

106 auto bottom = Value & 0x1f;

107

108 Value = (top << 6) | (middle << 3) | (bottom << 0);

109}

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202namespace ldi {

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214 Value = (upper << 4) | lower;

215}

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243}

244}

245

246namespace llvm {

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255 unsigned Kind = Fixup.getKind();

256 switch (Kind) {

257 default:

261 break;

264 break;

267 break;

270 break;

273 break;

278 break;

281 break;

286 break;

291

293 break;

296 break;

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305 break;

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313 break;

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321 break;

325 break;

328

330 break;

332 Value >>= 1;

334

336 break;

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340 break;

343 break;

344

347 break;

348

351 break;

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355 break;

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362 break;

363

366 break;

367 }

368}

369

370std::unique_ptr

373}

374

378 bool IsResolved,

381 return;

384 return;

385

387

388

389 auto NumBits = Info.TargetSize + Info.TargetOffset;

390 auto NumBytes = (NumBits / 8) + ((NumBits % 8) == 0 ? 0 : 1);

391

392

394

396 assert(Offset + NumBytes <= Data.size() && "Invalid fixup offset!");

397

398

399

400 for (unsigned i = 0; i < NumBytes; ++i) {

401 uint8_t mask = (((Value >> (i * 8)) & 0xff));

403 }

404}

405

407 unsigned Type;

409#define ELF_RELOC(X, Y) .Case(#X, Y)

410#include "llvm/BinaryFormat/ELFRelocs/AVR.def"

411#undef ELF_RELOC

412 .Case("BFD_RELOC_NONE", ELF::R_AVR_NONE)

413 .Case("BFD_RELOC_16", ELF::R_AVR_16)

414 .Case("BFD_RELOC_32", ELF::R_AVR_32)

416 if (Type != -1u)

418 return std::nullopt;

419}

420

422

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427

428

429 {"fixup_32", 0, 32, 0},

430

433

434 {"fixup_16", 0, 16, 0},

435 {"fixup_16_pm", 0, 16, 0},

436

437 {"fixup_ldi", 0, 8, 0},

438

439 {"fixup_lo8_ldi", 0, 8, 0},

440 {"fixup_hi8_ldi", 0, 8, 0},

441 {"fixup_hh8_ldi", 0, 8, 0},

442 {"fixup_ms8_ldi", 0, 8, 0},

443

444 {"fixup_lo8_ldi_neg", 0, 8, 0},

445 {"fixup_hi8_ldi_neg", 0, 8, 0},

446 {"fixup_hh8_ldi_neg", 0, 8, 0},

447 {"fixup_ms8_ldi_neg", 0, 8, 0},

448

449 {"fixup_lo8_ldi_pm", 0, 8, 0},

450 {"fixup_hi8_ldi_pm", 0, 8, 0},

451 {"fixup_hh8_ldi_pm", 0, 8, 0},

452

453 {"fixup_lo8_ldi_pm_neg", 0, 8, 0},

454 {"fixup_hi8_ldi_pm_neg", 0, 8, 0},

455 {"fixup_hh8_ldi_pm_neg", 0, 8, 0},

456

457 {"fixup_call", 0, 22, 0},

458

459 {"fixup_6", 0, 16, 0},

460 {"fixup_6_adiw", 0, 6, 0},

461

462 {"fixup_lo8_ldi_gs", 0, 8, 0},

463 {"fixup_hi8_ldi_gs", 0, 8, 0},

464

465 {"fixup_8", 0, 8, 0},

466 {"fixup_8_lo8", 0, 8, 0},

467 {"fixup_8_hi8", 0, 8, 0},

468 {"fixup_8_hlo8", 0, 8, 0},

469

470 {"fixup_diff8", 0, 8, 0},

471 {"fixup_diff16", 0, 16, 0},

472 {"fixup_diff32", 0, 32, 0},

473

474 {"fixup_lds_sts_16", 0, 16, 0},

475

476 {"fixup_port6", 0, 16, 0},

477 {"fixup_port5", 3, 5, 0},

478 };

479

480

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489 "Invalid kind!");

490

492}

493

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498

499 assert((Count % 2) == 0 && "NOP instructions must be 2 bytes");

500

501 OS.write_zeros(Count);

502 return true;

503}

504

510 switch ((unsigned)Fixup.getKind()) {

511 default:

513

518

519

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521

522

523

525 }

526

528 return true;

529 }

530}

531

536}

537

538}

unsigned const MachineRegisterInfo * MRI

Analysis containing CSE Info

PowerPC TLS Dynamic Call Fixup

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

This file implements the StringSwitch template, which mimics a switch() statement whose cases are str...

Utilities for manipulating generated AVR machine code.

const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const override

Get information on a fixup kind.

std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const override

void adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, uint64_t &Value, MCContext *Ctx=nullptr) const

void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const override

Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup...

std::optional< MCFixupKind > getFixupKind(StringRef Name) const override

Map a relocation name used in .reloc to a fixup kind.

bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const override

Write an (optimal) nop sequence of Count bytes to the given output.

bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, const uint64_t Value, const MCSubtargetInfo *STI) override

Hook to check if a relocation is needed for some target specific reason.

unsigned getNumFixupKinds() const override

Get the number of target specific fixup kinds.

Generic interface to target specific assembler backends.

virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const

Get information on a fixup kind.

Context object for machine code objects.

void reportError(SMLoc L, const Twine &Msg)

const MCSubtargetInfo * getSubtargetInfo() const

Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...

Generic base class for all target subtargets.

bool hasFeature(unsigned Feature) const

const Triple & getTargetTriple() const

This represents an "assembler immediate".

MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...

StringRef - Represent a constant reference to a string, i.e.

A switch()-like statement whose cases are string literals.

StringSwitch & Case(StringLiteral S, T Value)

Target - Wrapper for Target specific information.

OSType getOS() const

Get the parsed operating system type of this triple.

The instances of the Type class are immutable: once they are created, they are never changed.

LLVM Value Representation.

This class implements an extremely fast bulk output stream that can only output to a stream.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

static void ms8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

static void hi8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

static void neg(uint64_t &Value)

static void lo8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

static void hh8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

static void fixup(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

Adjusts a value to fix up the immediate of an LDI Rd, K instruction.

static void unsigned_width(unsigned Width, uint64_t Value, std::string Description, const MCFixup &Fixup, MCContext *Ctx)

static void adjustBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

Adjusts the value of a branch target before fixup application.

static void fixup_lds_sts_16(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

7-bit data space address fixup for the LDS/STS instructions on AVRTiny.

static void fixup_6(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

6-bit fixup for the immediate operand of the STD/LDD family of instructions.

static void fixup_6_adiw(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

6-bit fixup for the immediate operand of the ADIW family of instructions.

static void fixup_port5(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

5-bit port number fixup on the SBIC family of instructions.

static void fixup_port6(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

6-bit port number fixup on the IN family of instructions.

static void fixup_7_pcrel(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

7-bit PC-relative fixup.

static void fixup_13_pcrel(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

12-bit PC-relative fixup.

static void fixup_call(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx)

22-bit absolute fixup.

static void pm(uint64_t &Value)

Adjusts a program memory address.

static bool adjustRelativeBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value, const MCSubtargetInfo *STI)

Adjusts the value of a relative branch target before fixup application.

void adjustBranchTarget(T &val)

Adjusts the value of a branch target.

@ fixup_16_pm

A 16-bit program memory address.

@ fixup_16

A 16-bit address.

@ fixup_call

A 22-bit fixup for the target of a CALL k or JMP k instruction.

@ fixup_hh8_ldi

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 24-bit value ...

@ fixup_ms8_ldi_neg

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 32-bi...

@ fixup_lo8_ldi_neg

Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a negated 16-bi...

@ fixup_6_adiw

A symbol+addr fixup for the `LDD +, " family of instructions.

@ fixup_ms8_ldi

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 32-bit value ...

@ fixup_7_pcrel

A 7-bit PC-relative fixup for the family of conditional branches which take 7-bit targets (BRNE,...

@ fixup_ldi

Replaces the 8-bit immediate with another value.

@ fixup_lo8_ldi

Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a 16-bit value ...

@ fixup_hi8_ldi_pm_neg

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 16-bi...

@ fixup_hi8_ldi

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 16-bit value ...

@ fixup_lo8_ldi_pm

Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a 16-bit progra...

@ fixup_port6

A 6-bit port address.

@ fixup_hh8_ldi_neg

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 24-bi...

@ fixup_hh8_ldi_pm

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 24-bit progra...

@ fixup_port5

A 5-bit port address.

@ fixup_lo8_ldi_pm_neg

Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a negated 16-bi...

@ fixup_hi8_ldi_pm

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 16-bit progra...

@ fixup_hh8_ldi_pm_neg

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 24-bi...

@ fixup_13_pcrel

A 12-bit PC-relative fixup for the family of branches which take 12-bit targets (RJMP,...

@ fixup_hi8_ldi_neg

Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 16-bi...

This is an optimization pass for GlobalISel generic memory operations.

bool isUIntN(unsigned N, uint64_t x)

Checks if an unsigned integer fits into the given (dynamic) bit width.

MCFixupKind

Extensible enumeration to represent the type of a fixup.

@ FirstLiteralRelocationKind

The range [FirstLiteralRelocationKind, MaxTargetFixupKind) is used for relocations coming from ....

@ FK_Data_8

A eight-byte fixup.

@ FK_Data_1

A one-byte fixup.

@ FK_Data_4

A four-byte fixup.

@ FK_GPRel_4

A four-byte gp relative fixup.

@ FK_Data_2

A two-byte fixup.

std::unique_ptr< MCObjectTargetWriter > createAVRELFObjectWriter(uint8_t OSABI)

Creates an ELF object writer for AVR.

bool isIntN(unsigned N, int64_t x)

Checks if an signed integer fits into the given (dynamic) bit width.

MCAsmBackend * createAVRAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const llvm::MCTargetOptions &TO)

Creates an assembly backend for AVR.

uint64_t maxUIntN(uint64_t N)

Gets the maximum value for a N-bit unsigned integer.

Target independent information on a fixup kind.

@ FKF_IsPCRel

Is this fixup kind PCrelative? This is used by the assembler backend to evaluate fixup values in a ta...

unsigned TargetSize

The number of bits written by this fixup.