LLVM: lib/Target/AVR/AVRInstrInfo.h Source File (original) (raw)

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13#ifndef LLVM_AVR_INSTR_INFO_H

14#define LLVM_AVR_INSTR_INFO_H

15

17

19

20#define GET_INSTRINFO_HEADER

21#include "AVRGenInstrInfo.inc"

22#undef GET_INSTRINFO_HEADER

23

24namespace llvm {

25

26class AVRSubtarget;

27

46

64

65

67public:

69

75

78 bool KillSrc, bool RenamableDest = false,

79 bool RenamableSrc = false) const override;

89 int &FrameIndex) const override;

91 int &FrameIndex) const override;

92

93

97 bool AllowModify = false) const override;

101 int *BytesAdded = nullptr) const override;

103 int *BytesRemoved = nullptr) const override;

104 bool

106

108

110 int64_t BrOffset) const override;

111

115 int64_t BrOffset, RegScavenger *RS) const override;

116

117private:

119

120protected:

122};

123

124}

125

126#endif

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB

const SmallVectorImpl< MachineOperand > & Cond

Register isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override

AVRCC::CondCodes getCondFromBranchOpc(unsigned Opc) const

AVRCC::CondCodes getOppositeCondition(AVRCC::CondCodes CC) const

void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, Register DestReg, Register SrcReg, bool KillSrc, bool RenamableDest=false, bool RenamableSrc=false) const override

const AVRSubtarget & STI

Definition AVRInstrInfo.h:121

void insertIndirectBranch(MachineBasicBlock &MBB, MachineBasicBlock &NewDestBB, MachineBasicBlock &RestoreBB, const DebugLoc &DL, int64_t BrOffset, RegScavenger *RS) const override

void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override

unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override

MachineBasicBlock * getBranchDestBlock(const MachineInstr &MI) const override

bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override

void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override

AVRInstrInfo(const AVRSubtarget &STI)

bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override

unsigned getInstSizeInBytes(const MachineInstr &MI) const override

bool isBranchOffsetInRange(unsigned BranchOpc, int64_t BrOffset) const override

const AVRRegisterInfo & getRegisterInfo() const

Definition AVRInstrInfo.h:70

unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override

Register isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const override

const MCInstrDesc & getBrCond(AVRCC::CondCodes CC) const

Utilities relating to AVR registers.

A specific AVR target MCU.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

Describe properties that are true of each instruction in the target description file.

MachineInstrBundleIterator< MachineInstr > iterator

Representation of each machine instruction.

Wrapper class representing virtual and physical registers.

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

Definition AVRInstrInfo.h:28

CondCodes

AVR specific condition codes.

Definition AVRInstrInfo.h:33

@ COND_SH

Unsigned same or higher.

Definition AVRInstrInfo.h:38

@ COND_INVALID

Definition AVRInstrInfo.h:42

@ COND_GE

Greater than or equal.

Definition AVRInstrInfo.h:36

@ COND_MI

Minus.

Definition AVRInstrInfo.h:40

@ COND_LO

Unsigned lower.

Definition AVRInstrInfo.h:39

@ COND_LT

Less than.

Definition AVRInstrInfo.h:37

@ COND_PL

Plus.

Definition AVRInstrInfo.h:41

@ COND_EQ

Equal.

Definition AVRInstrInfo.h:34

@ COND_NE

Not equal.

Definition AVRInstrInfo.h:35

Definition AVRInstrInfo.h:47

TOF

Specifies a target operand flag.

Definition AVRInstrInfo.h:50

@ MO_HI

On a symbol operand, this represents the hi part.

Definition AVRInstrInfo.h:57

@ MO_NEG

On a symbol operand, this represents it has to be negated.

Definition AVRInstrInfo.h:60

@ MO_LO

On a symbol operand, this represents the lo part.

Definition AVRInstrInfo.h:54

@ MO_NO_FLAG

Definition AVRInstrInfo.h:51

This is an optimization pass for GlobalISel generic memory operations.