LLVM: lib/Target/Hexagon/BitTracker.h Source File (original) (raw)
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9#ifndef LLVM_LIB_TARGET_HEXAGON_BITTRACKER_H
10#define LLVM_LIB_TARGET_HEXAGON_BITTRACKER_H
11
17#include
18#include
19#include
20
21namespace llvm {
22
31
39
41 using CellMapType = std::map<unsigned, RegisterCell>;
42
45
46 void run();
47 void trace(bool On = false) { Trace = On; }
48 bool has(unsigned Reg) const;
49 const RegisterCell &lookup(unsigned Reg) const;
50 RegisterCell get(RegisterRef RR) const;
51 void put(RegisterRef RR, const RegisterCell &RC);
52 void subst(RegisterRef OldRR, RegisterRef NewRR);
55
57
58private:
61 void visitBranchesFrom(const MachineInstr &BI);
63
64 using CFGEdge = std::pair<int, int>;
65 using EdgeSetType = std::set;
66 using InstrSetType = std::set<const MachineInstr *>;
67 using EdgeQueueType = std::queue;
68
69
70
71 struct UseQueueType {
72 UseQueueType() : Uses(Dist) {}
73
74 unsigned size() const {
75 return Uses.size();
76 }
77 bool empty() const {
78 return size() == 0;
79 }
80 MachineInstr *front() const {
81 return Uses.top();
82 }
83 void push(MachineInstr *MI) {
84 if (Set.insert(MI).second)
85 Uses.push(MI);
86 }
87 void pop() {
88 Set.erase(front());
89 Uses.pop();
90 }
91 void reset() {
92 Dist.clear();
93 }
94 private:
95 struct Cmp {
96 Cmp(DenseMap<const MachineInstr*,unsigned> &Map) : Dist(Map) {}
97 bool operator()(const MachineInstr *MI, const MachineInstr *MJ) const;
98 DenseMap<const MachineInstr*,unsigned> &Dist;
99 };
100 DenseSet<const MachineInstr*> Set;
101 DenseMap<const MachineInstr*,unsigned> Dist;
102 std::priority_queue<MachineInstr *, std::vector<MachineInstr *>, Cmp> Uses;
103 };
104
105 void reset();
106 void runEdgeQueue(BitVector &BlockScanned);
107 void runUseQueue();
108
110 MachineFunction &MF;
111 MachineRegisterInfo &MRI;
113
114 EdgeSetType EdgeExec;
115 InstrSetType InstrExec;
116 UseQueueType UseQ;
117 EdgeQueueType FlowQ;
118 DenseSet ReachedBB;
119 bool Trace;
120};
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187 };
190
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196 if (Type != V.Type)
197 return false;
199 return false;
200 return true;
201 }
205
206 bool is(unsigned T) const {
209 : (T == 1 ? Type == One : false);
210 }
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228 if (Type == Ref && RefI == Self)
229 return false;
230 if (V.Type == Top)
231 return false;
232 if (*this == V)
233 return false;
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239 Type = V.Type;
240 RefI = V.RefI;
241 return true;
242 }
243
246 return true;
247 }
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264};
265
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269 if (V.Type != Ref)
271 if (V.RefI.Reg != 0)
272 return BitValue(V.RefI.Reg, V.RefI.Pos);
273 return self();
274}
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291private:
294};
295
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301 return Bits.size();
302 }
303
305 assert(BitN < Bits.size());
306 return Bits[BitN];
307 }
309 assert(BitN < Bits.size());
310 return Bits[BitN];
311 }
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339private:
340
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342 static const unsigned DefaultBitN = 32;
344 BitValueList Bits;
345
347};
348
350 return Map.find(Reg) != Map.end();
351}
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355 CellMapType::const_iterator F = Map.find(Reg);
357 return F->second;
358}
359
363 for (uint16_t i = 0; i < Width; ++i)
365 return RC;
366}
367
371 for (uint16_t i = 0; i < Width; ++i)
373 return RC;
374}
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380 for (unsigned i = 0; i < W; ++i)
382 return RC;
383}
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480 if (Idx == 0)
481 return RC;
483 }
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489};
490
491}
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493#endif
static bool evaluate(const MCSpecifierExpr &Expr, MCValue &Res, const MCAssembler *Asm)
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
static constexpr unsigned long long mask(BlockVerifier::State S)
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
raw_ostream & operator<<(raw_ostream &OS, const binary_le_impl< value_type > &BLE)
This file defines the DenseSet and SmallDenseSet classes.
bool operator==(const MergedFunctionsInfo &LHS, const MergedFunctionsInfo &RHS)
static MCRegister getReg(const MCDisassembler *D, unsigned RC, unsigned RegNo)
Remove Loads Into Fake Uses
static uint32_t rol(uint32_t Number, int Bits)
This file implements a set that has insertion order iteration characteristics.
This file defines the SmallVector class.
This is the shared class of boolean and integer constants.
Wrapper class representing physical registers. Should be passed by value.
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Wrapper class representing virtual and physical registers.
A vector that has set insertion semantics.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This class implements an extremely fast bulk output stream that can only output to a stream.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ C
The default llvm calling convention, compatible with C.
This namespace contains all of the command line option processing machinery.
This is an optimization pass for GlobalISel generic memory operations.
void fill(R &&Range, T &&Value)
Provide wrappers to std::fill which take ranges instead of having to pass begin/end explicitly.
constexpr bool isInt(int64_t x)
Checks if an integer fits into the given bit width.
@ Sub
Subtraction of integers.
Definition BitTracker.h:284
uint16_t first() const
Definition BitTracker.h:288
BitMask(uint16_t b, uint16_t e)
Definition BitTracker.h:286
uint16_t last() const
Definition BitTracker.h:289
Definition BitTracker.h:123
Register Reg
Definition BitTracker.h:131
BitRef(unsigned R=0, uint16_t P=0)
Definition BitTracker.h:124
uint16_t Pos
Definition BitTracker.h:132
bool operator==(const BitRef &BR) const
Definition BitTracker.h:126
Definition BitTracker.h:152
ValueType Type
Definition BitTracker.h:188
bool operator!=(const BitValue &V) const
Definition BitTracker.h:202
BitRef RefI
Definition BitTracker.h:189
static BitValue ref(const BitValue &V)
Definition BitTracker.h:268
ValueType
Definition BitTracker.h:153
@ One
Definition BitTracker.h:156
@ Ref
Definition BitTracker.h:157
@ Zero
Definition BitTracker.h:155
@ Top
Definition BitTracker.h:154
bool operator==(const BitValue &V) const
Definition BitTracker.h:195
BitValue(bool B)
Definition BitTracker.h:192
BitValue(unsigned Reg, uint16_t Pos)
Definition BitTracker.h:193
bool is(unsigned T) const
Definition BitTracker.h:206
static BitValue self(const BitRef &Self=BitRef())
Definition BitTracker.h:277
bool num() const
Definition BitTracker.h:254
friend raw_ostream & operator<<(raw_ostream &OS, const BitValue &BV)
BitValue(ValueType T=Top)
Definition BitTracker.h:191
bool meet(const BitValue &V, const BitRef &Self)
Definition BitTracker.h:226
Definition BitTracker.h:389
RegisterCell getRef(const RegisterRef &RR, const CellMapType &M) const
Definition BitTracker.h:402
virtual bool evaluate(const MachineInstr &BI, const CellMapType &Inputs, BranchTargetList &Targets, bool &FallsThru) const =0
MachineEvaluator(const TargetRegisterInfo &T, MachineRegisterInfo &M)
Definition BitTracker.h:390
const TargetRegisterInfo & TRI
Definition BitTracker.h:487
uint16_t getRegBitWidth(const RegisterRef &RR) const
MachineRegisterInfo & MRI
Definition BitTracker.h:488
virtual const TargetRegisterClass & composeWithSubRegIndex(const TargetRegisterClass &RC, unsigned Idx) const
Definition BitTracker.h:479
virtual bool track(const TargetRegisterClass *RC) const
Definition BitTracker.h:464
void putCell(const RegisterRef &RR, RegisterCell RC, CellMapType &M) const
RegisterCell getCell(const RegisterRef &RR, const CellMapType &M) const
virtual ~MachineEvaluator()=default
Definition BitTracker.h:297
BitValue & operator[](uint16_t BitN)
Definition BitTracker.h:308
static RegisterCell self(unsigned Reg, uint16_t Width)
Definition BitTracker.h:361
static RegisterCell ref(const RegisterCell &C)
Definition BitTracker.h:377
uint16_t width() const
Definition BitTracker.h:300
const BitValue & operator[](uint16_t BitN) const
Definition BitTracker.h:304
static RegisterCell top(uint16_t Width)
Definition BitTracker.h:369
RegisterCell(uint16_t Width=DefaultBitN)
Definition BitTracker.h:298
Definition BitTracker.h:138
RegisterRef(Register R=0, unsigned S=0)
Definition BitTracker.h:139
RegisterRef(const MachineOperand &MO)
Definition BitTracker.h:140
Register Reg
Definition BitTracker.h:143
unsigned Sub
Definition BitTracker.h:144
SetVector< const MachineBasicBlock * > BranchTargetList
Definition BitTracker.h:40
bool has(unsigned Reg) const
Definition BitTracker.h:349
const RegisterCell & lookup(unsigned Reg) const
Definition BitTracker.h:354
bool reached(const MachineBasicBlock *B) const
void trace(bool On=false)
Definition BitTracker.h:47
void subst(RegisterRef OldRR, RegisterRef NewRR)
void print_cells(raw_ostream &OS) const
std::map< unsigned, RegisterCell > CellMapType
Definition BitTracker.h:41
void put(RegisterRef RR, const RegisterCell &RC)
BitTracker(const MachineEvaluator &E, MachineFunction &F)
void visit(const MachineInstr &MI)
RegisterCell get(RegisterRef RR) const