LLVM: lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp Source File (original) (raw)
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17
18#define DEBUG_TYPE "csky-asmbackend"
19
20using namespace llvm;
21
22std::unique_ptr
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34 {"fixup_csky_pcrel_imm16_scale2", 0, 32, 0}},
36 {"fixup_csky_pcrel_uimm16_scale4", 0, 32, 0}},
38 {"fixup_csky_pcrel_uimm8_scale4", 0, 32, 0}},
40 {"fixup_csky_pcrel_imm26_scale2", 0, 32, 0}},
42 {"fixup_csky_pcrel_imm18_scale2", 0, 32, 0}},
45 {"fixup_csky_got_imm18_scale4", 0, 32, 0}},
50 {"fixup_csky_plt_imm18_scale4", 0, 32, 0}},
52 {"fixup_csky_pcrel_imm10_scale2", 0, 16, 0}},
54 {"fixup_csky_pcrel_uimm7_scale4", 0, 16, 0}},
56 {"fixup_csky_doffset_imm18", 0, 18, 0}},
58 {"fixup_csky_doffset_imm18_scale2", 0, 18, 0}},
60 {"fixup_csky_doffset_imm18_scale4", 0, 18, 0}}};
61
63 "Not all fixup kinds added to Infos array");
64
66 return {};
69 return Infos[Kind];
70}
71
74 switch (Fixup.getKind()) {
75 default:
83 llvm_unreachable("Relocation should be unconditionally forced\n");
90 return Value & 0xffffffff;
93 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
95 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned.");
96
97 return (Value >> 1) & 0xffff;
100 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
102 Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned.");
103
104 return (Value >> 2) & 0xffff;
107 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
109 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned.");
110
111 return (Value >> 1) & 0x3ffffff;
114 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
116 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned.");
117
118 return (Value >> 1) & 0x3ffff;
121 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
123 Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned.");
124
125 unsigned IMM4L = (Value >> 2) & 0xf;
126 unsigned IMM4H = (Value >> 6) & 0xf;
127
128 Value = (IMM4H << 21) | (IMM4L << 4);
130 }
133 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
135 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned.");
136
137 return (Value >> 1) & 0x3ff;
139 if ((Value >> 2) > 0xfe)
140 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
142 Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned.");
143
144 if ((Value >> 2) <= 0x7f) {
145 unsigned IMM5L = (Value >> 2) & 0x1f;
146 unsigned IMM2H = (Value >> 7) & 0x3;
147
148 Value = (1 << 12) | (IMM2H << 8) | IMM5L;
149 } else {
150 unsigned IMM5L = (~Value >> 2) & 0x1f;
151 unsigned IMM2H = (~Value >> 7) & 0x3;
152
153 Value = (IMM2H << 8) | IMM5L;
154 }
155
157 }
158}
159
164 bool Resolved) const {
165
166 if (!Resolved)
167 return true;
168
170 switch (Fixup.getKind()) {
171 default:
172 return false;
180 return ((Value >> 2) > 0xfe) || (Value & 0x3);
181 }
182}
183
187
188
189
190 switch (Fixup.getKind()) {
194 Value = (Asm->getFragmentOffset(F) + Fixup.getOffset()) % 4;
195 }
196 return {};
197}
198
203 IsResolved = false;
205
208 return;
212 return;
213
215
216
217 Value <<= Info.TargetOffset;
218
219 unsigned NumBytes = alignTo(Info.TargetSize + Info.TargetOffset, 8) / 8;
220
221 assert(Fixup.getOffset() + NumBytes <= F.getSize() &&
222 "Invalid fixup offset!");
223
224
225
228
229 if (IsLittleEndian && IsInstFixup && (NumBytes == 4)) {
234 } else {
235 for (unsigned I = 0; I != NumBytes; I++) {
236 unsigned Idx = IsLittleEndian ? I : (NumBytes - 1 - I);
238 }
239 }
240}
241
244 switch (Opcode) {
245 default:
246 return false;
247 case CSKY::JBR32:
248 case CSKY::JBT32:
249 case CSKY::JBF32:
250 case CSKY::JBSR32:
252 return false;
253 return true;
254 case CSKY::JBR16:
255 case CSKY::JBT16:
256 case CSKY::JBF16:
257 case CSKY::LRW16:
258 case CSKY::BR16:
259 return true;
260 }
261}
262
265 if (Target.getSpecifier())
266 return true;
267 switch (Fixup.getKind()) {
268 default:
269 break;
273 return true;
274 }
275
276 return false;
277}
278
283
287
289 default:
292 case CSKY::LRW16:
296 break;
297 case CSKY::BR16:
300 break;
301 case CSKY::JBSR32:
304 break;
305 case CSKY::JBR32:
308 break;
309 case CSKY::JBT32:
310 case CSKY::JBF32:
311 Res.setOpcode(Inst.getOpcode() == CSKY::JBT32 ? CSKY::JBT_E : CSKY::JBF_E);
315 break;
316 case CSKY::JBR16:
320 break;
321 case CSKY::JBT16:
322 case CSKY::JBF16:
323
324 unsigned opcode;
326 opcode = Inst.getOpcode() == CSKY::JBT16 ? CSKY::JBT32 : CSKY::JBF32;
327 else
328 opcode = Inst.getOpcode() == CSKY::JBT16 ? CSKY::JBT_E : CSKY::JBF_E;
329
334 break;
335 }
336 Inst = std::move(Res);
337}
338
344
unsigned const MachineRegisterInfo * MRI
static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, uint64_t Value, MCContext &Ctx, const Triple &TheTriple, bool IsResolved)
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
This file defines the DenseMap class.
PowerPC TLS Dynamic Call Fixup
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
bool shouldForceRelocation(const MCFixup &Fixup, const MCValue &Target)
Definition CSKYAsmBackend.cpp:263
MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override
Get information on a fixup kind.
Definition CSKYAsmBackend.cpp:27
bool fixupNeedsRelaxationAdvanced(const MCFragment &, const MCFixup &, const MCValue &, uint64_t, bool) const override
Target specific predicate for whether a given fixup requires the associated instruction to be relaxed...
Definition CSKYAsmBackend.cpp:160
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value) const override
Simple predicate for targets where !Resolved implies requiring relaxation.
Definition CSKYAsmBackend.cpp:279
std::optional< bool > evaluateFixup(const MCFragment &, MCFixup &, MCValue &, uint64_t &) override
Definition CSKYAsmBackend.cpp:184
bool mayNeedRelaxation(unsigned Opcode, ArrayRef< MCOperand > Operands, const MCSubtargetInfo &STI) const override
Check whether the given instruction (encoded as Opcode+Operands) may need relaxation.
Definition CSKYAsmBackend.cpp:242
void applyFixup(const MCFragment &, const MCFixup &, const MCValue &Target, uint8_t *Data, uint64_t Value, bool IsResolved) override
Definition CSKYAsmBackend.cpp:199
void relaxInstruction(MCInst &Inst, const MCSubtargetInfo &STI) const override
Relax the instruction in the given fragment to the next wider instruction.
Definition CSKYAsmBackend.cpp:284
std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const override
Definition CSKYAsmBackend.cpp:23
bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const override
Write an (optimal) nop sequence of Count bytes to the given output.
Definition CSKYAsmBackend.cpp:339
Generic interface to target specific assembler backends.
const llvm::endianness Endian
virtual MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.
MCContext & getContext() const
void maybeAddReloc(const MCFragment &, const MCFixup &, const MCValue &, uint64_t &Value, bool IsResolved)
Context object for machine code objects.
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Instances of this class represent a single low-level machine instruction.
unsigned getOpcode() const
LLVM_ABI void dump() const
void addOperand(const MCOperand Op)
void setOpcode(unsigned Op)
const MCOperand & getOperand(unsigned i) const
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Generic base class for all target subtargets.
bool hasFeature(unsigned Feature) const
Target - Wrapper for Target specific information.
LLVM Value Representation.
This class implements an extremely fast bulk output stream that can only output to a stream.
raw_ostream & write_zeros(unsigned NumZeros)
write_zeros - Insert 'NumZeros' nulls.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ fixup_csky_pcrel_imm10_scale2
@ fixup_csky_pcrel_uimm7_scale4
@ fixup_csky_doffset_imm18_scale2
@ fixup_csky_pcrel_imm16_scale2
@ fixup_csky_pcrel_imm18_scale2
@ fixup_csky_doffset_imm18_scale4
@ fixup_csky_pcrel_uimm16_scale4
@ fixup_csky_plt_imm18_scale4
@ fixup_csky_pcrel_imm26_scale2
@ fixup_csky_got_imm18_scale4
@ fixup_csky_pcrel_uimm8_scale4
@ fixup_csky_doffset_imm18
bool isRelocation(MCFixupKind FixupKind)
This is an optimization pass for GlobalISel generic memory operations.
MCAsmBackend * createCSKYAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
Definition CSKYAsmBackend.cpp:345
std::unique_ptr< MCObjectTargetWriter > createCSKYELFObjectWriter()
constexpr bool isUIntN(unsigned N, uint64_t x)
Checks if an unsigned integer fits into the given (dynamic) bit width.
uint16_t MCFixupKind
Extensible enumeration to represent the type of a fixup.
FunctionAddr VTableAddr Count
@ FK_Data_8
A eight-byte fixup.
@ FK_Data_1
A one-byte fixup.
@ FK_Data_4
A four-byte fixup.
@ FK_Data_2
A two-byte fixup.
FunctionAddr VTableAddr uintptr_t uintptr_t Data
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
constexpr bool isShiftedInt(int64_t x)
Checks if a signed integer is an N bit number shifted left by S.
constexpr bool isIntN(unsigned N, int64_t x)
Checks if an signed integer fits into the given (dynamic) bit width.
Target independent information on a fixup kind.