LLVM: lib/CodeGen/CodeGenCommonISel.cpp Source File (original) (raw)
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22#define DEBUG_TYPE "codegen-common"
23
24using namespace llvm;
25
26
27
29StackProtectorDescriptor::addSuccessorMBB(
32
33 if (!SuccMBB) {
37 MF->insert(++BBI, SuccMBB);
38 }
39
42 return SuccMBB;
43}
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54
55
56 if (.isCopy() &&
.isImplicitDef()) {
57
58
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61 if (MI.isDebugInstr())
62 return true;
63
64
65
66 switch (MI.getOpcode()) {
67 case TargetOpcode::G_TRUNC:
68 case TargetOpcode::G_ZEXT:
69 case TargetOpcode::G_ANYEXT:
70 case TargetOpcode::G_SEXT:
71 case TargetOpcode::G_MERGE_VALUES:
72 case TargetOpcode::G_UNMERGE_VALUES:
73 case TargetOpcode::G_CONCAT_VECTORS:
74 case TargetOpcode::G_BUILD_VECTOR:
75 case TargetOpcode::G_EXTRACT:
76 return true;
77 default:
78 return false;
79 }
80 }
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92 return false;
93
94
95 if (MI.isImplicitDef())
96 return true;
97
98
100 ++OPI2;
101 assert(OPI2 != MI.operands_end()
102 && "Should have a copy implying we should have 2 arguments.");
103
104
105
106 if (!OPI2->isReg() ||
108 return false;
109
110 return true;
111}
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130 if (SplitPoint == BB->begin())
131 return SplitPoint;
132
135 do {
136 --Previous;
137 } while (Previous != Start && Previous->isDebugInstr());
138
139 if (TII.isTailCall(*SplitPoint) &&
140 Previous->getOpcode() == TII.getCallFrameDestroyOpcode()) {
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157 do {
158 --Previous;
159 if (Previous->isCall())
160 return SplitPoint;
161 } while(Previous->getOpcode() != TII.getCallFrameSetupOpcode());
162
163 return Previous;
164 }
165
167 SplitPoint = Previous;
168 if (Previous == Start)
169 break;
170 --Previous;
171 }
172
173 return SplitPoint;
174}
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178
179
180
181 switch (static_cast<unsigned>(InvertedTest)) {
203 return InvertedTest;
207
208
209
210 return UseFCmp ? InvertedTest : fcNone;
211 default:
213 }
214
216}
217
220 assert(Copy.getOpcode() == TargetOpcode::COPY && "Must be a COPY");
221
222 return &Copy.getOperand(1);
223}
224
228 assert(Trunc.getOpcode() == TargetOpcode::G_TRUNC && "Must be a G_TRUNC");
229
231 const auto ToLLT = MRI.getType(Trunc.defs().begin()->getReg());
232
233
234 if (!FromLLT.isScalar()) {
235 return nullptr;
236 }
237
239 ToLLT.getSizeInBits(), false);
240 Ops.append(ExtOps.begin(), ExtOps.end());
242}
243
247 switch (MI.getOpcode()) {
248 case TargetOpcode::G_TRUNC:
250 case TargetOpcode::COPY:
252 default:
253 return nullptr;
254 }
255}
256
260
261
262
263 const unsigned MaxExpressionSize = 128;
264
265 for (auto *DefMO : DbgUsers) {
268 continue;
269 }
270
271 int UseMOIdx =
274 "Must use salvaged instruction as its location");
275
276
277 if (DbgMI->getOpcode() != TargetOpcode::DBG_VALUE) {
278 assert(DbgMI->getOpcode() == TargetOpcode::DBG_VALUE_LIST &&
279 "Must be either DBG_VALUE or DBG_VALUE_LIST");
280 continue;
281 }
282
284
287 if (!Op0)
288 continue;
290
291 bool IsValidSalvageExpr =
293 if (IsValidSalvageExpr) {
294 auto &UseMO = DbgMI->getOperand(UseMOIdx);
295 UseMO.setReg(Op0->getReg());
296 UseMO.setSubReg(Op0->getSubReg());
298
300 }
301 }
302}
unsigned const MachineRegisterInfo * MRI
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
const TargetInstrInfo & TII
static MachineOperand * getSalvageOpsForTrunc(const MachineRegisterInfo &MRI, MachineInstr &Trunc, SmallVectorImpl< uint64_t > &Ops)
Definition CodeGenCommonISel.cpp:225
static MachineOperand * getSalvageOpsForCopy(const MachineRegisterInfo &MRI, MachineInstr &Copy)
Definition CodeGenCommonISel.cpp:218
static bool MIIsInTerminatorSequence(const MachineInstr &MI)
Given that the input MI is before a partial terminator sequence TSeq, return true if M + TSeq also a ...
Definition CodeGenCommonISel.cpp:53
const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
LLVM Basic Block Representation.
static BranchProbability getBranchProbStackProtector(bool IsLikely)
unsigned getNumElements() const
static LLVM_ABI ExtOps getExtOps(unsigned FromSize, unsigned ToSize, bool Signed)
Returns the ops for a zero- or sign-extension in a DIExpression.
static LLVM_ABI DIExpression * appendOpsToArg(const DIExpression *Expr, ArrayRef< uint64_t > Ops, unsigned ArgNo, bool StackValue=false)
Create a copy of Expr by appending the given list of Ops to each instance of the operand DW_OP_LLVM_a...
LLVM_ABI iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
LLVM_ABI void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
MachineInstrBundleIterator< MachineInstr > iterator
BasicBlockListType::iterator iterator
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)
CreateMachineInstr - Allocate a new MachineInstr.
void insert(iterator MBBI, MachineBasicBlock *MBB)
Representation of each machine instruction.
mop_range defs()
Returns all explicit operands that are register definitions.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
bool hasDebugOperandForReg(Register Reg) const
Returns whether this debug value has at least one debug operand with the register Reg.
const MachineBasicBlock * getParent() const
LLVM_ABI const MachineOperand & getDebugExpressionOp() const
Return the operand for the complex address expression referenced by this DBG_VALUE instruction.
const MachineOperand * const_mop_iterator
LLVM_ABI int findRegisterUseOperandIdx(Register Reg, const TargetRegisterInfo *TRI, bool isKill=false) const
Returns the operand index that is a use of the specific register or -1 if it is not found.
LLVM_ABI const DIExpression * getDebugExpression() const
Return the complex address expression referenced by this DBG_VALUE instruction.
const MachineOperand & getOperand(unsigned i) const
bool isIndirectDebugValue() const
A DBG_VALUE is indirect iff the location operand is a register and the offset operand is an immediate...
MachineOperand class - Representation of each machine instruction operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
LLVM_ABI void setReg(Register Reg)
Change the register this operand corresponds to.
void setMetadata(const MDNode *MD)
Register getReg() const
getReg - Returns the register number.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
constexpr bool isPhysical() const
Return true if the specified register number is in the physical register namespace.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
TargetInstrInfo - Interface to description of machine instruction set.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.
FPClassTest invertFPClassTestIfSimpler(FPClassTest Test, bool UseFCmp)
Evaluates if the specified FP class test is better performed as the inverse (i.e.
Definition CodeGenCommonISel.cpp:176
MachineBasicBlock::iterator findSplitPointForStackProtector(MachineBasicBlock *BB, const TargetInstrInfo &TII)
Find the split point at which to splice the end of BB into its success stack protector check machine ...
Definition CodeGenCommonISel.cpp:127
FPClassTest
Floating-point class tests, supported by 'is_fpclass' intrinsic.
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
LLVM_ABI Value * salvageDebugInfoImpl(Instruction &I, uint64_t CurrentLocOps, SmallVectorImpl< uint64_t > &Ops, SmallVectorImpl< Value * > &AdditionalValues)
void salvageDebugInfoForDbgValue(const MachineRegisterInfo &MRI, MachineInstr &MI, ArrayRef< MachineOperand * > DbgUsers)
Assuming the instruction MI is going to be deleted, attempt to salvage debug users of MI by writing t...
Definition CodeGenCommonISel.cpp:257