LLVM: lib/CodeGen/CriticalAntiDepBreaker.h Source File (original) (raw)
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15#ifndef LLVM_LIB_CODEGEN_CRITICALANTIDEPBREAKER_H
16#define LLVM_LIB_CODEGEN_CRITICALANTIDEPBREAKER_H
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21#include
22#include
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24namespace llvm {
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53 std::vector<const TargetRegisterClass *> Classes;
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56 std::multimap<MCRegister, MachineOperand *> RegRefs;
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58 using RegRefIter =
59 std::multimap<MCRegister, MachineOperand *>::const_iterator;
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63 std::vector KillIndices;
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67 std::vector DefIndices;
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73 public:
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85 unsigned InsertPosIndex,
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91 unsigned InsertPosIndex) override;
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96 private:
99 bool isNewRegClobberedByRefs(RegRefIter RegRefBegin, RegRefIter RegRefEnd,
102 findSuitableFreeRegister(RegRefIter RegRefBegin, RegRefIter RegRefEnd,
106 };
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108}
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110#endif
This file implements the BitVector class.
#define LLVM_LIBRARY_VISIBILITY
This class works in conjunction with the post-RA scheduler to rename registers to break register anti...
std::vector< std::pair< MachineInstr *, MachineInstr * > > DbgValueVector
~CriticalAntiDepBreaker() override
unsigned BreakAntiDependencies(const std::vector< SUnit > &SUnits, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned InsertPosIndex, DbgValueVector &DbgValues) override
Identifiy anti-dependencies along the critical path of the ScheduleDAG and break them by renaming reg...
void FinishBlock() override
Finish anti-dep breaking for a basic block.
void Observe(MachineInstr &MI, unsigned Count, unsigned InsertPosIndex) override
Update liveness information to account for the current instruction, which will not be scheduled.
void StartBlock(MachineBasicBlock *BB) override
Initialize anti-dep breaking for a new basic block.
CriticalAntiDepBreaker(MachineFunction &MFi, const RegisterClassInfo &RCI)
Wrapper class representing physical registers. Should be passed by value.
MachineInstrBundleIterator< MachineInstr > iterator
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
FunctionAddr VTableAddr Count