LLVM: include/llvm/CodeGen/DetectDeadLanes.h Source File (original) (raw)
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28#ifndef LLVM_CODEGEN_DETECTDEADLANES_H
29#define LLVM_CODEGEN_DETECTDEADLANES_H
30
34#include
35
36namespace llvm {
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45public:
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60 return VRegInfos[RegIdx];
61 }
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64 return DefinedByCopy.test(RegIdx);
65 }
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67private:
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84public:
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96private:
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103 void PutInWorklist(unsigned RegIdx) {
104 if (WorklistMembers.test(RegIdx))
105 return;
106 WorklistMembers.set(RegIdx);
107 Worklist.push_back(RegIdx);
108 }
109
110 std::unique_ptr<VRegInfo[]> VRegInfos;
111
112 std::deque Worklist;
113 BitVector WorklistMembers;
114
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116 BitVector DefinedByCopy;
117};
118
125
126}
127
128#endif
unsigned const MachineRegisterInfo * MRI
This file implements the BitVector class.
A common definition of LaneBitmask for use in TableGen and CodeGen.
Register const TargetRegisterInfo * TRI
bool test(unsigned Idx) const
LaneBitmask transferUsedLanes(const MachineInstr &MI, LaneBitmask UsedLanes, const MachineOperand &MO) const
Given a mask UsedLanes used from the output of instruction MI determine which lanes are used from ope...
void computeSubRegisterLaneBitInfo()
Update the DefinedLanes and the UsedLanes for all virtual registers.
DeadLaneDetector(const MachineRegisterInfo *MRI, const TargetRegisterInfo *TRI)
bool isDefinedByCopy(unsigned RegIdx) const
Definition DetectDeadLanes.h:63
LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum, LaneBitmask DefinedLanes) const
Given a mask DefinedLanes of lanes defined at operand OpNum of COPY-like instruction,...
const VRegInfo & getVRegInfo(unsigned RegIdx) const
Definition DetectDeadLanes.h:59
Definition DetectDeadLanes.h:119
static bool isRequired()
Definition DetectDeadLanes.h:123
PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
A set of analyses that are preserved following a run of a transformation pass.
Wrapper class representing virtual and physical registers.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
A Use represents the edge between a Value definition and its users.
This is an optimization pass for GlobalISel generic memory operations.
AnalysisManager< MachineFunction > MachineFunctionAnalysisManager
Contains a bitmask of which lanes of a given virtual register are defined and which ones are actually...
Definition DetectDeadLanes.h:48
LaneBitmask UsedLanes
Definition DetectDeadLanes.h:49
LaneBitmask DefinedLanes
Definition DetectDeadLanes.h:50
A CRTP mix-in to automatically provide informational APIs needed for passes.