ExecuteStage.cpp Source File (original) (raw)

21#define DEBUG_TYPE "llvm-mca"

23namespace llvm {

24namespace mca {

47 return false;

48 }

50 return true;

51}

69 return S;

70 }

72 for (const InstRef &I : Pending)

75 for (const InstRef &I : Ready)

78}

80Error ExecuteStage::issueReadyInstructions() {

82 while (IR) {

83 if (Error Err = issueInstruction(IR))

84 return Err;

88 }

90 return ErrorSuccess();

91}

99 HWS.cycleEvent(Freed, Executed, Pending, Ready);

100 NumDispatchedOpcodes = 0;

101 NumIssuedOpcodes = 0;

102

105

108

110 return S;

111 }

112

113 for (const InstRef &IR : Pending)

115

118

119 return issueReadyInstructions();

120}

121

123 if (!EnablePressureEvents)

125

126

127

128 if (!HWS.hadTokenStall() && NumDispatchedOpcodes <= NumIssuedOpcodes)

130

132 uint64_t Mask = HWS.analyzeResourcePressure(Insts);

133 if (Mask) {

134 LLVM_DEBUG(dbgs() << "[E] Backpressure increased because of unavailable "

135 "pipeline resources: "

139 }

140

143 HWS.analyzeDataDependencies(RegDeps, MemDeps);

144 if (RegDeps.size()) {

146 dbgs() << "[E] Backpressure increased by register dependencies\n");

149 }

150

151 if (MemDeps.size()) {

152 LLVM_DEBUG(dbgs() << "[E] Backpressure increased by memory dependencies\n");

155 }

156

158}

159

160#ifndef NDEBUG

164 assert(Inst.isReady() && "Instruction in an inconsistent state!");

165

166

167

169 "Cannot eliminate a memory op!");

170}

171#endif

172

173Error ExecuteStage::handleInstructionEliminated(InstRef &IR) {

174#ifndef NDEBUG

176#endif

180 IR.getInstruction()->forceExecuted();

183}

184

185

188

189#ifndef NDEBUG

190

191 HWS.instructionCheck(IR);

192#endif

193

194 if (IR.getInstruction()->isEliminated())

195 return handleInstructionEliminated(IR);

196

197

198

199

200

201 bool IsReadyInstruction = HWS.dispatch(IR);

204 NumDispatchedOpcodes += NumMicroOps;

206

207 if (!IsReadyInstruction) {

211 }

212

214

215

217

218

219

220 if (!HWS.mustIssueImmediately(IR))

222

223

224 return issueInstruction(IR);

225}

226

232

238

244

246 LLVM_DEBUG(dbgs() << "[E] Resource Available: [" << RR.first << '.'

247 << RR.second << "]\n");

249 Listener->onResourceAvailable(RR);

250}

251

255 dbgs() << "[E] Instruction Issued: #" << IR << '\n';

257 assert(Use.second.getDenominator() == 1 && "Invalid cycles!");

258 dbgs() << "[E] Resource Used: [" << Use.first.first << '.'

259 << Use.first.second << "], ";

260 dbgs() << "cycles: " << Use.second.getNumerator() << '\n';

261 }

262 });

263

264

266 Use.first.first = HWS.getResourceID(Use.first.first);

267

269}

270

273 uint64_t UsedBuffers = IR.getInstruction()->getDesc().UsedBuffers;

274 if (!UsedBuffers)

275 return;

276

278 for (unsigned &ID : BufferIDs) {

279 uint64_t CurrentBufferMask = UsedBuffers & (-UsedBuffers);

280 ID = HWS.getResourceID(CurrentBufferMask);

281 UsedBuffers ^= CurrentBufferMask;

282 }

283

286 Listener->onReservedBuffers(IR, BufferIDs);

287 return;

288 }

289

291 Listener->onReleasedBuffers(IR, BufferIDs);

292}

293

294}

295}

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

This file defines the execution stage of a default instruction pipeline.

Legalize the Machine IR a function s Machine IR

This file defines the SmallVector class.

Subclass of Error for the sole purpose of identifying the success path in the type system.

Lightweight error class with error context and mandatory checking.

MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

A Use represents the edge between a Value definition and its users.

void notifyResourceAvailable(const ResourceRef &RR) const

Definition ExecuteStage.cpp:245

Error cycleStart() override

Called once at the start of each cycle.

Definition ExecuteStage.cpp:93

bool isAvailable(const InstRef &IR) const override

Returns true if it can execute IR during this cycle.

Definition ExecuteStage.cpp:43

Error cycleEnd() override

Called once at the end of each cycle.

Definition ExecuteStage.cpp:122

void notifyInstructionExecuted(const InstRef &IR) const

Definition ExecuteStage.cpp:227

void notifyInstructionIssued(const InstRef &IR, MutableArrayRef< ResourceUse > Used) const

Definition ExecuteStage.cpp:252

void notifyReservedOrReleasedBuffers(const InstRef &IR, bool Reserved) const

Definition ExecuteStage.cpp:271

void notifyInstructionReady(const InstRef &IR) const

Definition ExecuteStage.cpp:239

Error execute(InstRef &IR) override

The primary action that this stage performs on instruction IR.

Definition ExecuteStage.cpp:186

void notifyInstructionPending(const InstRef &IR) const

Definition ExecuteStage.cpp:233

An InstRef contains both a SourceMgr index and Instruction pair.

unsigned getNumMicroOps() const

An instruction propagated through the simulated instruction pipeline.

bool isEliminated() const

@ SC_DISPATCH_GROUP_STALL

LLVM_ABI InstRef select()

Select the next instruction to issue from the ReadySet.

LLVM_ABI void issueInstruction(InstRef &IR, SmallVectorImpl< std::pair< ResourceRef, ReleaseAtCycles > > &Used, SmallVectorImpl< InstRef > &Pending, SmallVectorImpl< InstRef > &Ready)

Issue an instruction and populates a vector of used pipeline resources, and a vector of instructions ...

Error moveToTheNextStage(InstRef &IR)

Called when an instruction is ready to move the next pipeline stage.

void notifyEvent(const EventT &Event) const

Notify listeners of a particular hardware event.

const std::set< HWEventListener * > & getListeners() const

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

char InstructionError< T >::ID

HWStallEvent::GenericEventType toHWStallEventType(Scheduler::Status Status)

Definition ExecuteStage.cpp:26

std::pair< uint64_t, uint64_t > ResourceRef

static void verifyInstructionEliminated(const InstRef &IR)

Definition ExecuteStage.cpp:161

std::pair< ResourceRef, ReleaseAtCycles > ResourceUse

This is an optimization pass for GlobalISel generic memory operations.

constexpr int popcount(T Value) noexcept

Count the number of set bits in a value.

LLVM_ABI raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

FormattedNumber format_hex(uint64_t N, unsigned Width, bool Upper=false)

format_hex - Output N as a fixed width hexadecimal.