FunctionLoweringInfo.cpp Source File (original) (raw)

38#include

39using namespace llvm;

41#define DEBUG_TYPE "function-lowering-info"

47 if (I->use_empty()) return false;

50 for (const User *U : I->users())

52 return true;

54 return false;

55}

66 unsigned NumOfSigned = 0, NumOfUnsigned = 0;

67 for (const Use &U : I->uses()) {

69 NumOfSigned += CI->isSigned();

70 NumOfUnsigned += CI->isUnsigned();

71 }

73 if (!CallI->isArgOperand(&U))

74 continue;

75 unsigned ArgNo = CallI->getArgOperandNo(&U);

76 NumOfUnsigned += CallI->paramHasAttr(ArgNo, Attribute::ZExt);

77 NumOfSigned += CallI->paramHasAttr(ArgNo, Attribute::SExt);

78 }

79 }

80 if (NumOfSigned > NumOfUnsigned)

83 return ExtendKind;

84}

88 Fn = &fn;

89 MF = &mf;

90 TLI = MF->getSubtarget().getTargetLowering();

102 TLI->CanLowerReturn(CC, *MF, Fn->isVarArg(), Outs, Fn->getContext(), Fn->getReturnType());

103

104

107 Fn->hasPersonalityFn() ? Fn->getPersonalityFn() : nullptr);

109

117

118

121 if (const AllocaInst *AI = H.CatchObj.Alloca)

122 CatchObjects[AI].push_back(&H.CatchObj.FrameIndex);

123 else

124 H.CatchObj.FrameIndex = INT_MAX;

125 }

126 }

127 }

128

129

130

131

136 Type *Ty = AI->getAllocatedType();

137 Align Alignment = AI->getAlign();

138

139

140

141

142 if (AI->isStaticAlloca() &&

146 MF->getDataLayout().getTypeAllocSize(Ty).getKnownMinValue();

147

148 TySize *= CUI->getZExtValue();

149 if (TySize == 0) TySize = 1;

150 int FrameIndex = INT_MAX;

151 auto Iter = CatchObjects.find(AI);

152 if (Iter != CatchObjects.end() && TLI->needsFixedCatchObjects()) {

153 FrameIndex = MF->getFrameInfo().CreateFixedObject(

154 TySize, 0, false, true);

155 MF->getFrameInfo().setObjectAlignment(FrameIndex, Alignment);

156 } else {

157 FrameIndex = MF->getFrameInfo().CreateStackObject(TySize, Alignment,

158 false, AI);

159 }

160

161

162

163

164 if (Ty->isScalableTy())

165 MF->getFrameInfo().setStackID(FrameIndex,

167

169

170 if (Iter != CatchObjects.end()) {

171 for (int *CatchObjPtr : Iter->second)

172 *CatchObjPtr = FrameIndex;

173 }

174 } else {

175

176

177

178

179 MF->getFrameInfo().CreateVariableSizedObject(

180 Alignment <= StackAlign ? Align(1) : Alignment, AI);

181 }

183

184 if (Call->isInlineAsm()) {

185 Register SP = TLI->getStackPointerRegisterToSaveRestore();

187 std::vectorTargetLowering::AsmOperandInfo Ops =

188 TLI->ParseConstraints(Fn->getDataLayout(), TRI,

192

193 TLI->ComputeConstraintToUse(Op, SDValue(), DAG);

194 std::pair<unsigned, const TargetRegisterClass *> PhysReg =

195 TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,

196 Op.ConstraintVT);

197 if (PhysReg.first == SP)

198 MF->getFrameInfo().setHasOpaqueSPAdjustment(true);

199 }

200 }

201 }

203 switch (II->getIntrinsicID()) {

204 case Intrinsic::vastart:

205

206

207

208 MF->getFrameInfo().setHasVAStart(true);

209 break;

210 case Intrinsic::fake_use:

211

212

213 MF->setHasFakeUses(true);

214 break;

215 default:

216 break;

217 }

218 }

219

220

221

223 if (CI->isMustTailCall() && Fn->isVarArg())

224 MF->getFrameInfo().setHasMustTailInVarArgFunc(true);

225 }

226

227

228 if (Call->hasFnAttr(Attribute::ReturnsTwice))

229 MF->setExposesReturnsTwice(true);

230 }

231

232

233

237

238

239

242 }

243 }

244

245

246

247

248 MBBMap.resize(Fn->getMaxBlockNumber());

250

251

252 if (BB.isEHPad()) {

254

255

256

257

259 MF->setHasEHScopes(true);

260 MF->setHasEHFunclets(true);

261 MF->getFrameInfo().setHasOpaqueSPAdjustment(true);

262 }

264 assert(BB.begin() == PadInst &&

265 "WinEHPrepare failed to remove PHIs from imaginary BBs");

266 continue;

267 }

270 assert(BB.begin() == PadInst && "WinEHPrepare failed to demote PHIs");

271 }

272

275 MF->push_back(MBB);

276

277

278

279

280 if (BB.hasAddressTaken())

281 MBB->setAddressTakenIRBlock(const_cast<BasicBlock *>(&BB));

282

283

284 if (BB.isEHPad())

285 MBB->setIsEHPad();

286

287

288

289 for (const PHINode &PN : BB.phis()) {

290 if (PN.use_empty())

291 continue;

292

293

294 if (PN.getType()->isEmptyTy())

295 continue;

296

299 assert(PHIReg && "PHI node does not have an assigned virtual register!");

300

303 for (EVT VT : ValueVTs) {

304 unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);

306 for (unsigned i = 0; i != NumRegisters; ++i)

307 BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);

308 PHIReg += NumRegisters;

309 }

310 }

311 }

312

315

316

319 if (H.Handler)

321 }

322 }

333

334

340 }

346 auto &Srcs = UnwindDestToSrcs[DestMBB];

347 for (const auto P : KV.second)

349 }

351 }

352}

353

354

355

356

362 LiveOutRegInfo.clear();

373}

374

375

377 return RegInfo->createVirtualRegister(TLI->getRegClassFor(VT, isDivergent));

378}

379

380

381

382

383

384

385

386

390

392 for (EVT ValueVT : ValueVTs) {

393 MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT);

394

395 unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT);

396 for (unsigned i = 0; i != NumRegs; ++i) {

398 if (!FirstReg) FirstReg = R;

399 }

400 }

401 return FirstReg;

402}

403

405 return CreateRegs(V->getType(), UA && UA->isDivergent(V) &&

406 TLI ->requiresUniformRegister(*MF, V));

407}

408

410

412 return 0;

414 assert(R == Register() && "Already initialized this value register!");

417}

418

419

420

421

422

423

426 if (!LiveOutRegInfo.inBounds(Reg))

427 return nullptr;

428

431 return nullptr;

432

436 }

437

438 return LOI;

439}

440

441

442

445 if (!Ty->isIntegerTy() || Ty->isVectorTy())

446 return;

447

451 "PHIs with non-vector integer types should have a single VT.");

452 EVT IntVT = ValueVTs[0];

453

454 if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)

455 return;

456 IntVT = TLI->getRegisterType(PN->getContext(), IntVT);

458

461 return;

462

463 Register DestReg = It->second;

464 if (DestReg == 0)

465 return;

467 LiveOutRegInfo.grow(DestReg);

468 LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];

469

474 return;

475 }

476

479 if (TLI->signExtendConstant(CI))

481 else

485 } else {

486 assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"

487 "CopyToReg node was created.");

491 return;

492 }

494 if (!SrcLOI) {

496 return;

497 }

498 DestLOI = *SrcLOI;

499 }

500

503 "Masks should have the same bit width as the type.");

504

510 return;

511 }

512

515 if (TLI->signExtendConstant(CI))

517 else

522 continue;

523 }

524

525 assert(ValueMap.count(V) && "V should have been placed in ValueMap when "

526 "its CopyToReg node was created.");

530 return;

531 }

533 if (!SrcLOI) {

535 return;

536 }

539 }

540}

541

542

543

544

549

550

551

552

556 return I->second;

557 LLVM_DEBUG(dbgs() << "Argument does not have assigned frame index!\n");

558 return INT_MAX;

559}

560

565 Register &VReg = I.first->second;

566 if (I.second)

567 VReg = MRI.createVirtualRegister(RC);

568 assert(VReg && "null vreg in exception pointer table!");

569 return VReg;

570}

571

577 ValueVTs.clear();

579 P.first->getType(), ValueVTs);

581 for (EVT VT : ValueVTs) {

582 unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);

583 for (unsigned i = 0, e = NumRegisters; i != e; ++i)

585 }

586 }

587 }

589}

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

const TargetInstrInfo & TII

This file implements a class to represent arbitrary precision integral constant values and operations...

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

static const Function * getParent(const Value *V)

static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")

static ISD::NodeType getPreferredExtendForValue(const Instruction *I)

Definition FunctionLoweringInfo.cpp:57

static bool isUsedOutsideOfDefiningBlock(const Instruction *I)

isUsedOutsideOfDefiningBlock - Return true if this instruction is used by PHI nodes or outside of the...

Definition FunctionLoweringInfo.cpp:46

const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]

Promote Memory to Register

uint64_t IntrinsicInst * II

This file describes how to lower LLVM code to machine code.

LLVM IR instance of the generic uniformity analysis.

Class for arbitrary precision integers.

LLVM_ABI APInt zext(unsigned width) const

Zero extend to a new width.

unsigned getBitWidth() const

Return the number of bits in the APInt.

unsigned getNumSignBits() const

Computes the number of leading bits of this APInt that are equal to its sign bit.

LLVM_ABI APInt sext(unsigned width) const

Sign extend to a new width.

an instruction to allocate memory on the stack

This class represents an incoming formal argument to a Function.

LLVM Basic Block Representation.

InstListType::const_iterator const_iterator

This is the shared class of boolean and integer constants.

uint64_t getZExtValue() const

Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...

iterator find(const_arg_type_t< KeyT > Val)

std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)

Definition FunctionLoweringInfo.cpp:404

SmallPtrSet< const DbgVariableRecord *, 8 > PreprocessedDVRDeclares

Collection of dbg_declare instructions handled after argument lowering and before ISel proper.

void clear()

clear - Clear out all the function-specific state.

Definition FunctionLoweringInfo.cpp:357

MachineBasicBlock * getMBB(const BasicBlock *BB) const

DenseSet< Register > RegsWithFixups

void setArgumentFrameIndex(const Argument *A, int FI)

setArgumentFrameIndex - Record frame index for the byval argument.

Definition FunctionLoweringInfo.cpp:545

SmallVector< bool > VisitedBBs

The set of basic blocks visited thus far by instruction selection.

BitVector DescribedArgs

Bitvector with a bit set if corresponding argument is described in ArgDbgValues.

DenseMap< const AllocaInst *, int > StaticAllocaMap

StaticAllocaMap - Keep track of frame indices for fixed sized allocas in the entry block.

const UniformityInfo * UA

DenseMap< const Instruction *, StatepointSpillMapTy > StatepointRelocationMaps

int getArgumentFrameIndex(const Argument *A)

getArgumentFrameIndex - Get frame index for the byval argument.

Definition FunctionLoweringInfo.cpp:553

const LiveOutInfo * GetLiveOutRegInfo(Register Reg)

GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the register is a PHI destinat...

Definition FunctionLoweringInfo.cpp:409

DenseMap< const Value *, Register > ValueMap

ValueMap - Since we emit code for the function a basic block at a time, we must remember which virtua...

SmallVector< unsigned, 50 > StatepointStackSlots

StatepointStackSlots - A list of temporary stack slots (frame indices) used to spill values at a stat...

void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG)

set - Initialize this FunctionLoweringInfo with the given Function and its associated MachineFunction...

Definition FunctionLoweringInfo.cpp:86

MachineBasicBlock * MBB

MBB - The current block.

DenseMap< const Argument *, int > ByValArgFrameIndexMap

ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.

DenseMap< Register, Register > RegFixups

RegFixups - Registers which need to be replaced after isel is done.

SmallVector< MachineInstr *, 8 > ArgDbgValues

ArgDbgValues - A list of DBG_VALUE instructions created during isel for function arguments that are i...

void ComputePHILiveOutRegInfo(const PHINode *)

ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination register based on the LiveOutI...

Definition FunctionLoweringInfo.cpp:443

SmallVector< MachineBasicBlock * > MBBMap

A mapping from LLVM basic block number to their machine block.

const TargetLowering * TLI

const Value * getValueFromVirtualReg(Register Vreg)

This method is called from TargetLowerinInfo::isSDNodeSourceOfDivergence to get the Value correspondi...

Definition FunctionLoweringInfo.cpp:573

DenseMap< Register, const Value * > VirtReg2Value

VirtReg2Value map is needed by the Divergence Analysis driven instruction selection.

MachineRegisterInfo * RegInfo

CreateReg - Allocate a single virtual register for the given type.

Definition FunctionLoweringInfo.cpp:376

bool CanLowerReturn

CanLowerReturn - true iff the function's return value can be lowered to registers.

DenseMap< const Value *, ISD::NodeType > PreferredExtendType

Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) for a value.

Definition FunctionLoweringInfo.cpp:561

DenseMap< const Value *, Register > CatchPadExceptionPointers

Track virtual registers created for exception pointers.

const DataLayout & getDataLayout() const

Return the DataLayout attached to the Module associated to this MF.

MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)

CreateMachineInstr - Allocate a new MachineInstr.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

Value * getIncomingValue(unsigned i) const

Return incoming value number x.

unsigned getNumIncomingValues() const

Return the number of incoming edges.

Wrapper class representing virtual and physical registers.

constexpr bool isVirtual() const

Return true if the specified register number is in the virtual register namespace.

This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...

const UniformityInfo * getUniformityInfo() const

CodeGenOptLevel getOptLevel() const

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

Information about stack frame layout on the target.

bool isStackRealignable() const

isStackRealignable - This method returns whether the stack can be realigned.

virtual TargetStackID::Value getStackIDForScalableVectors() const

Returns the StackID that scalable vectors should be associated with.

Align getStackAlign() const

getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...

TargetInstrInfo - Interface to description of machine instruction set.

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

The instances of the Type class are immutable: once they are created, they are never changed.

A Use represents the edge between a Value definition and its users.

LLVM Value Representation.

Type * getType() const

All values are typed, get the type of this value.

LLVM_ABI LLVMContext & getContext() const

All values hold a context through their type.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

NodeType

ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.

@ ANY_EXTEND

ANY_EXTEND - Used for integer types. The high bits are undefined.

@ SIGN_EXTEND

Conversion operators.

This is an optimization pass for GlobalISel generic memory operations.

LLVM_ABI void GetReturnInfo(CallingConv::ID CC, Type *ReturnType, AttributeList attr, SmallVectorImpl< ISD::OutputArg > &Outs, const TargetLowering &TLI, const DataLayout &DL)

Given an LLVM IR type and return type attributes, compute the return value EVTs and flags,...

MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)

Builder interface. Specify how to create the initial instruction itself.

void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, SmallVectorImpl< EVT > &ValueVTs, SmallVectorImpl< EVT > *MemVTs=nullptr, SmallVectorImpl< TypeSize > *Offsets=nullptr, TypeSize StartingOffset=TypeSize::getZero())

ComputeValueVTs - Given an LLVM IR type, compute a sequence of EVTs that represent all the individual...

decltype(auto) dyn_cast(const From &Val)

dyn_cast - Return the argument parameter cast to the specified type.

void calculateWinCXXEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)

Analyze the IR in ParentFn and it's handlers to build WinEHFuncInfo, which describes the state number...

LLVM_ABI raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

LLVM_ABI EHPersonality classifyEHPersonality(const Value *Pers)

See if the given exception handling personality function is one that we understand.

bool isa(const From &Val)

isa - Return true if the parameter to the template is an instance of one of the template type argu...

bool isFuncletEHPersonality(EHPersonality Pers)

Returns true if this is a personality function that invokes handler funclets (which must return to it...

void calculateSEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)

DWARFExpression::Operation Op

bool isAsynchronousEHPersonality(EHPersonality Pers)

Returns true if this personality function catches asynchronous exceptions.

constexpr unsigned BitWidth

void calculateWasmEHInfo(const Function *F, WasmEHFuncInfo &EHInfo)

decltype(auto) cast(const From &Val)

cast - Return the argument parameter cast to the specified type.

void calculateClrEHStateNumbers(const Function *Fn, WinEHFuncInfo &FuncInfo)

This struct is a compact representation of a valid (non-zero power of two) alignment.

TypeSize getSizeInBits() const

Return the size of the specified value type in bits.

static KnownBits makeConstant(const APInt &C)

Create known bits from a known constant.

unsigned getBitWidth() const

Get the bit width of this value.

KnownBits intersectWith(const KnownBits &RHS) const

Returns KnownBits information that is known to be true for both this and RHS.

KnownBits anyext(unsigned BitWidth) const

Return known bits for an "any" extension of the value we're tracking, where we don't know anything ab...

Similar to CxxUnwindMapEntry, but supports SEH filters.

This contains information for each constraint that we are lowering.

DenseMap< BBOrMBB, SmallPtrSet< BBOrMBB, 4 > > UnwindDestToSrcs

DenseMap< BBOrMBB, BBOrMBB > SrcToUnwindDest

SmallVector< SEHUnwindMapEntry, 4 > SEHUnwindMap

SmallVector< ClrEHUnwindMapEntry, 4 > ClrEHUnwindMap

SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap

SmallVector< CxxUnwindMapEntry, 4 > CxxUnwindMap

SmallVector< WinEHHandlerType, 1 > HandlerArray