FunctionLoweringInfo.h Source File (original) (raw)

14#ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H

15#define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H

29#include

30#include

31#include

33namespace llvm {

37class BranchProbabilityInfo;

38class DbgDeclareInst;

40class Instruction;

41class MachineFunction;

42class MachineInstr;

43class MachineRegisterInfo;

44class MVT;

45class SelectionDAG;

46class TargetLowering;

48template class GenericSSAContext;

58public:

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231 if (!LiveOutRegInfo.inBounds(Reg))

232 return nullptr;

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238 return LOI;

239 }

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252 if (NumSignBits == 1 && Known.isUnknown())

253 return;

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255 LiveOutRegInfo.grow(Reg);

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275 if (Reg == 0)

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278 LiveOutRegInfo.grow(Reg);

279 LiveOutRegInfo[Reg].IsValid = false;

280 }

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298private:

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301};

302

303}

304

305#endif

This file implements the BitVector class.

static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")

This file defines the DenseMap class.

This file implements an indexed map.

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

This file defines the SmallPtrSet class.

This file defines the SmallVector class.

This class represents an incoming formal argument to a Function.

LLVM Basic Block Representation.

unsigned getNumber() const

Analysis providing branch probability information.

Implements a dense probed hash-table based set.

FunctionLoweringInfo - This contains information that is global to a function that is used when lower...

BranchProbabilityInfo * BPI

SmallPtrSet< const DbgVariableRecord *, 8 > PreprocessedDVRDeclares

void clear()

clear - Clear out all the function-specific state.

MachineBasicBlock * getMBB(const BasicBlock *BB) const

DenseSet< Register > RegsWithFixups

DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg allocated to hold a pointer to ...

void setArgumentFrameIndex(const Argument *A, int FI)

setArgumentFrameIndex - Record frame index for the byval argument.

unsigned OrigNumPHINodesToUpdate

SmallVector< bool > VisitedBBs

The set of basic blocks visited thus far by instruction selection.

void InvalidatePHILiveOutRegInfo(const PHINode *PN)

InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be called when a block is visited b...

BitVector DescribedArgs

Bitvector with a bit set if corresponding argument is described in ArgDbgValues.

DenseMap< const AllocaInst *, int > StaticAllocaMap

StaticAllocaMap - Keep track of frame indices for fixed sized allocas in the entry block.

const UniformityInfo * UA

DenseMap< const Instruction *, StatepointSpillMapTy > StatepointRelocationMaps

unsigned CurCallSite

The current call site index being processed, if any. 0 if none.

int getArgumentFrameIndex(const Argument *A)

getArgumentFrameIndex - Get frame index for the byval argument.

bool isExportedInst(const Value *V) const

isExportedInst - Return true if the specified value is an instruction exported from its block.

void AddLiveOutRegInfo(Register Reg, unsigned NumSignBits, const KnownBits &Known)

AddLiveOutRegInfo - Adds LiveOutInfo for a register.

const LiveOutInfo * GetLiveOutRegInfo(Register Reg)

GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the register is a PHI destinat...

unsigned ExceptionPointerVirtReg

If the current MBB is a landing pad, the exception pointer and exception selector registers are copie...

bool SplitCSR

True if part of the CSRs will be handled via explicit copies.

SmallPtrSet< const DbgDeclareInst *, 8 > PreprocessedDbgDeclares

Collection of dbg.declare instructions handled after argument lowering and before ISel proper.

DenseMap< const Value *, Register > ValueMap

ValueMap - Since we emit code for the function a basic block at a time, we must remember which virtua...

MachineBasicBlock::iterator InsertPt

MBB - The current insert position inside the current block.

SmallVector< unsigned, 50 > StatepointStackSlots

StatepointStackSlots - A list of temporary stack slots (frame indices) used to spill values at a stat...

void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG)

set - Initialize this FunctionLoweringInfo with the given Function and its associated MachineFunction...

MachineBasicBlock * MBB

MBB - The current block.

std::vector< std::pair< MachineInstr *, unsigned > > PHINodesToUpdate

PHINodesToUpdate - A list of phi instructions whose operand list will be updated after processing the...

DenseMap< const Argument *, int > ByValArgFrameIndexMap

ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.

DenseMap< Register, Register > RegFixups

RegFixups - Registers which need to be replaced after isel is done.

unsigned ExceptionSelectorVirtReg

SmallVector< MachineInstr *, 8 > ArgDbgValues

ArgDbgValues - A list of DBG_VALUE instructions created during isel for function arguments that are i...

unsigned getCurrentCallSite()

Get the call site currently being processed, if any. Return zero if none.

void ComputePHILiveOutRegInfo(const PHINode *)

ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination register based on the LiveOutI...

SmallVector< MachineBasicBlock * > MBBMap

A mapping from LLVM basic block number to their machine block.

const TargetLowering * TLI

const Value * getValueFromVirtualReg(Register Vreg)

This method is called from TargetLowerinInfo::isSDNodeSourceOfDivergence to get the Value correspondi...

void setCurrentCallSite(unsigned Site)

Set the call site currently being processed.

DenseMap< Register, const Value * > VirtReg2Value

VirtReg2Value map is needed by the Divergence Analysis driven instruction selection.

MachineRegisterInfo * RegInfo

CreateReg - Allocate a single virtual register for the given type.

bool CanLowerReturn

CanLowerReturn - true iff the function's return value can be lowered to registers.

DenseMap< const Value *, ISD::NodeType > PreferredExtendType

Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) for a value.

DenseMap< const Value *, Register > CatchPadExceptionPointers

Track virtual registers created for exception pointers.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

Wrapper class representing virtual and physical registers.

This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...

SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...

The instances of the Type class are immutable: once they are created, they are never changed.

size_type count(const KeyT &Val) const

Return 1 if the specified key is in the map, 0 otherwise.

iterator find(const KeyT &Val)

LLVM Value Representation.

@ BasicBlock

Various leaf nodes.

This is an optimization pass for GlobalISel generic memory operations.

constexpr unsigned BitWidth

Helper object to track which of three possible relocation mechanisms are used for a particular value ...

union llvm::FunctionLoweringInfo::StatepointRelocationRecord::payload_t payload

enum llvm::FunctionLoweringInfo::StatepointRelocationRecord::RelocType type

bool isUnknown() const

Returns true if we don't know any bits.