LLVM: lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp File Reference (original) (raw)

RenameIndependentSubregs pass leaves large partially used super registers, for example: undef %0.sub4:VReg_1024 = ... %0.sub5:VReg_1024 = ... %0.sub6:VReg_1024 = ... %0.sub7:VReg_1024 = ... use %0.sub4_sub5_sub6_sub7 use %0.sub6_sub7. More...

RenameIndependentSubregs pass leaves large partially used super registers, for example: undef %0.sub4:VReg_1024 = ... %0.sub5:VReg_1024 = ... %0.sub6:VReg_1024 = ... %0.sub7:VReg_1024 = ... use %0.sub4_sub5_sub6_sub7 use %0.sub6_sub7.

GCNRewritePartialRegUses goes right after RenameIndependentSubregs and rewrites such partially used super registers with registers of minimal size: undef %0.sub0:VReg_128 = ... %0.sub1:VReg_128 = ... %0.sub2:VReg_128 = ... %0.sub3:VReg_128 = ... use %0.sub0_sub1_sub2_sub3 use %0.sub2_sub3

This allows to avoid subreg lanemasks tracking during register pressure calculation and creates more possibilities for the code unaware of lanemasks

Definition in file GCNRewritePartialRegUses.cpp.