GenericMachineInstrs.h Source File (original) (raw)

14#ifndef LLVM_CODEGEN_GLOBALISEL_GENERICMACHINEINSTRS_H

15#define LLVM_CODEGEN_GLOBALISEL_GENERICMACHINEINSTRS_H

25namespace llvm {

29 constexpr static unsigned PoisonFlags =

33public:

50};

54public:

80};

85public:

90 switch (MI->getOpcode()) {

91 case TargetOpcode::G_LOAD:

92 case TargetOpcode::G_STORE:

93 case TargetOpcode::G_ZEXTLOAD:

94 case TargetOpcode::G_SEXTLOAD:

95 return true;

96 default:

97 return false;

98 }

99 }

100};

101

102

103

104

106public:

107

109

111

113

115

118

120 return MI->getOpcode() == TargetOpcode::G_INDEXED_LOAD;

121 }

122};

123

124

126public:

128 return MI->getOpcode() == TargetOpcode::G_INDEXED_SEXTLOAD ||

129 MI->getOpcode() == TargetOpcode::G_INDEXED_ZEXTLOAD;

130 }

131};

132

133

135public:

137 switch (MI->getOpcode()) {

138 case TargetOpcode::G_INDEXED_LOAD:

139 case TargetOpcode::G_INDEXED_ZEXTLOAD:

140 case TargetOpcode::G_INDEXED_SEXTLOAD:

141 return true;

142 default:

143 return false;

144 }

145 }

146};

147

148

150public:

152 return MI->getOpcode() == TargetOpcode::G_INDEXED_ZEXTLOAD;

153 }

154};

155

156

158public:

160 return MI->getOpcode() == TargetOpcode::G_INDEXED_SEXTLOAD;

161 }

162};

163

164

166public:

167

169

171

173

175

178

180 return MI->getOpcode() == TargetOpcode::G_INDEXED_STORE;

181 }

182};

183

184

186public:

187

189

190

194

196 switch (MI->getOpcode()) {

197 case TargetOpcode::G_LOAD:

198 case TargetOpcode::G_ZEXTLOAD:

199 case TargetOpcode::G_SEXTLOAD:

200 return true;

201 default:

202 return false;

203 }

204 }

205};

206

207

209public:

211 return MI->getOpcode() == TargetOpcode::G_LOAD;

212 }

213};

214

215

217public:

219 return MI->getOpcode() == TargetOpcode::G_SEXTLOAD ||

220 MI->getOpcode() == TargetOpcode::G_ZEXTLOAD;

221 }

222};

223

224

226public:

228 return MI->getOpcode() == TargetOpcode::G_SEXTLOAD;

229 }

230};

231

232

234public:

236 return MI->getOpcode() == TargetOpcode::G_ZEXTLOAD;

237 }

238};

239

240

242public:

243

245

247 return MI->getOpcode() == TargetOpcode::G_STORE;

248 }

249};

250

251

253public:

254

256

258

260 return MI->getOpcode() == TargetOpcode::G_UNMERGE_VALUES;

261 }

262};

263

264

265

266

268public:

269

271

273

275 switch (MI->getOpcode()) {

276 case TargetOpcode::G_MERGE_VALUES:

277 case TargetOpcode::G_CONCAT_VECTORS:

278 case TargetOpcode::G_BUILD_VECTOR:

279 return true;

280 default:

281 return false;

282 }

283 }

284};

285

286

288public:

290 return MI->getOpcode() == TargetOpcode::G_MERGE_VALUES;

291 }

292};

293

294

296public:

298 return MI->getOpcode() == TargetOpcode::G_CONCAT_VECTORS;

299 }

300};

301

302

304public:

306 return MI->getOpcode() == TargetOpcode::G_BUILD_VECTOR;

307 }

308};

309

310

312public:

314 return MI->getOpcode() == TargetOpcode::G_BUILD_VECTOR_TRUNC;

315 }

316};

317

318

320public:

324

326 return MI->getOpcode() == TargetOpcode::G_SHUFFLE_VECTOR;

327 }

328};

329

330

332public:

335

337 return MI->getOpcode() == TargetOpcode::G_PTR_ADD;

338 }

339};

340

341

343public:

345 return MI->getOpcode() == TargetOpcode::G_IMPLICIT_DEF;

346 }

347};

348

349

351public:

355

357 return MI->getOpcode() == TargetOpcode::G_SELECT;

358 }

359};

360

361

363public:

369

371 return MI->getOpcode() == TargetOpcode::G_ICMP ||

372 MI->getOpcode() == TargetOpcode::G_FCMP;

373 }

374};

375

376

378public:

380 return MI->getOpcode() == TargetOpcode::G_ICMP;

381 }

382};

383

384

386public:

388 return MI->getOpcode() == TargetOpcode::G_FCMP;

389 }

390};

391

392

393

394

395

396

398public:

405

407 switch (MI->getOpcode()) {

408 case TargetOpcode::G_UADDO:

409 case TargetOpcode::G_SADDO:

410 case TargetOpcode::G_USUBO:

411 case TargetOpcode::G_SSUBO:

412 case TargetOpcode::G_UADDE:

413 case TargetOpcode::G_SADDE:

414 case TargetOpcode::G_USUBE:

415 case TargetOpcode::G_SSUBE:

416 case TargetOpcode::G_UMULO:

417 case TargetOpcode::G_SMULO:

418 return true;

419 default:

420 return false;

421 }

422 }

423};

424

425

426

427

428

429

431public:

434 case TargetOpcode::G_UADDO:

435 case TargetOpcode::G_SADDO:

436 case TargetOpcode::G_UADDE:

437 case TargetOpcode::G_SADDE:

438 return true;

439 default:

440 return false;

441 }

442 }

444

447 case TargetOpcode::G_SADDO:

448 case TargetOpcode::G_SSUBO:

449 case TargetOpcode::G_SADDE:

450 case TargetOpcode::G_SSUBE:

451 return true;

452 default:

453 return false;

454 }

455 }

457

459 switch (MI->getOpcode()) {

460 case TargetOpcode::G_UADDO:

461 case TargetOpcode::G_SADDO:

462 case TargetOpcode::G_USUBO:

463 case TargetOpcode::G_SSUBO:

464 case TargetOpcode::G_UADDE:

465 case TargetOpcode::G_SADDE:

466 case TargetOpcode::G_USUBE:

467 case TargetOpcode::G_SSUBE:

468 return true;

469 default:

470 return false;

471 }

472 }

473};

474

475

476

478public:

480

482 switch (MI->getOpcode()) {

483 case TargetOpcode::G_UADDO:

484 case TargetOpcode::G_SADDO:

485 return true;

486 default:

487 return false;

488 }

489 }

490};

491

492

493

495public:

497

499 switch (MI->getOpcode()) {

500 case TargetOpcode::G_USUBO:

501 case TargetOpcode::G_SSUBO:

502 return true;

503 default:

504 return false;

505 }

506 }

507};

508

509

510

512public:

514

516 switch (MI->getOpcode()) {

517 case TargetOpcode::G_UADDE:

518 case TargetOpcode::G_SADDE:

519 case TargetOpcode::G_USUBE:

520 case TargetOpcode::G_SSUBE:

521 return true;

522 default:

523 return false;

524 }

525 }

526};

527

528

530public:

534

536

539 case TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS:

540 case TargetOpcode::G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS:

541 return true;

542 default:

543 return false;

544 }

545 }

546

549 case TargetOpcode::G_INTRINSIC_CONVERGENT:

550 case TargetOpcode::G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS:

551 return true;

552 default:

553 return false;

554 }

555 }

556

558 switch (MI->getOpcode()) {

559 case TargetOpcode::G_INTRINSIC:

560 case TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS:

561 case TargetOpcode::G_INTRINSIC_CONVERGENT:

562 case TargetOpcode::G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS:

563 return true;

564 default:

565 return false;

566 }

567 }

568};

569

570

572public:

574 switch (MI->getOpcode()) {

575 case TargetOpcode::G_VECREDUCE_FADD:

576 case TargetOpcode::G_VECREDUCE_FMUL:

577 case TargetOpcode::G_VECREDUCE_FMAX:

578 case TargetOpcode::G_VECREDUCE_FMIN:

579 case TargetOpcode::G_VECREDUCE_FMAXIMUM:

580 case TargetOpcode::G_VECREDUCE_FMINIMUM:

581 case TargetOpcode::G_VECREDUCE_ADD:

582 case TargetOpcode::G_VECREDUCE_MUL:

583 case TargetOpcode::G_VECREDUCE_AND:

584 case TargetOpcode::G_VECREDUCE_OR:

585 case TargetOpcode::G_VECREDUCE_XOR:

586 case TargetOpcode::G_VECREDUCE_SMAX:

587 case TargetOpcode::G_VECREDUCE_SMIN:

588 case TargetOpcode::G_VECREDUCE_UMAX:

589 case TargetOpcode::G_VECREDUCE_UMIN:

590 return true;

591 default:

592 return false;

593 }

594 }

595

596

597

599 unsigned ScalarOpc;

601 case TargetOpcode::G_VECREDUCE_FADD:

602 ScalarOpc = TargetOpcode::G_FADD;

603 break;

604 case TargetOpcode::G_VECREDUCE_FMUL:

605 ScalarOpc = TargetOpcode::G_FMUL;

606 break;

607 case TargetOpcode::G_VECREDUCE_FMAX:

608 ScalarOpc = TargetOpcode::G_FMAXNUM;

609 break;

610 case TargetOpcode::G_VECREDUCE_FMIN:

611 ScalarOpc = TargetOpcode::G_FMINNUM;

612 break;

613 case TargetOpcode::G_VECREDUCE_FMAXIMUM:

614 ScalarOpc = TargetOpcode::G_FMAXIMUM;

615 break;

616 case TargetOpcode::G_VECREDUCE_FMINIMUM:

617 ScalarOpc = TargetOpcode::G_FMINIMUM;

618 break;

619 case TargetOpcode::G_VECREDUCE_ADD:

620 ScalarOpc = TargetOpcode::G_ADD;

621 break;

622 case TargetOpcode::G_VECREDUCE_MUL:

623 ScalarOpc = TargetOpcode::G_MUL;

624 break;

625 case TargetOpcode::G_VECREDUCE_AND:

626 ScalarOpc = TargetOpcode::G_AND;

627 break;

628 case TargetOpcode::G_VECREDUCE_OR:

629 ScalarOpc = TargetOpcode::G_OR;

630 break;

631 case TargetOpcode::G_VECREDUCE_XOR:

632 ScalarOpc = TargetOpcode::G_XOR;

633 break;

634 case TargetOpcode::G_VECREDUCE_SMAX:

635 ScalarOpc = TargetOpcode::G_SMAX;

636 break;

637 case TargetOpcode::G_VECREDUCE_SMIN:

638 ScalarOpc = TargetOpcode::G_SMIN;

639 break;

640 case TargetOpcode::G_VECREDUCE_UMAX:

641 ScalarOpc = TargetOpcode::G_UMAX;

642 break;

643 case TargetOpcode::G_VECREDUCE_UMIN:

644 ScalarOpc = TargetOpcode::G_UMIN;

645 break;

646 default:

648 }

649 return ScalarOpc;

650 }

651};

652

653

655public:

656

658

662

666

668 return MI->getOpcode() == TargetOpcode::G_PHI;

669 }

670};

671

672

674public:

677

679 switch (MI->getOpcode()) {

680

681 case TargetOpcode::G_ADD:

682 case TargetOpcode::G_SUB:

683 case TargetOpcode::G_MUL:

684 case TargetOpcode::G_SDIV:

685 case TargetOpcode::G_UDIV:

686 case TargetOpcode::G_SREM:

687 case TargetOpcode::G_UREM:

688 case TargetOpcode::G_SMIN:

689 case TargetOpcode::G_SMAX:

690 case TargetOpcode::G_UMIN:

691 case TargetOpcode::G_UMAX:

692

693 case TargetOpcode::G_FMINNUM:

694 case TargetOpcode::G_FMAXNUM:

695 case TargetOpcode::G_FMINNUM_IEEE:

696 case TargetOpcode::G_FMAXNUM_IEEE:

697 case TargetOpcode::G_FMINIMUM:

698 case TargetOpcode::G_FMAXIMUM:

699 case TargetOpcode::G_FADD:

700 case TargetOpcode::G_FSUB:

701 case TargetOpcode::G_FMUL:

702 case TargetOpcode::G_FDIV:

703 case TargetOpcode::G_FPOW:

704

705 case TargetOpcode::G_AND:

706 case TargetOpcode::G_OR:

707 case TargetOpcode::G_XOR:

708 return true;

709 default:

710 return false;

711 }

712 };

713};

714

715

717public:

719 switch (MI->getOpcode()) {

720 case TargetOpcode::G_ADD:

721 case TargetOpcode::G_SUB:

722 case TargetOpcode::G_MUL:

723 case TargetOpcode::G_SDIV:

724 case TargetOpcode::G_UDIV:

725 case TargetOpcode::G_SREM:

726 case TargetOpcode::G_UREM:

727 case TargetOpcode::G_SMIN:

728 case TargetOpcode::G_SMAX:

729 case TargetOpcode::G_UMIN:

730 case TargetOpcode::G_UMAX:

731 return true;

732 default:

733 return false;

734 }

735 };

736};

737

738

740public:

742 switch (MI->getOpcode()) {

743 case TargetOpcode::G_FMINNUM:

744 case TargetOpcode::G_FMAXNUM:

745 case TargetOpcode::G_FMINNUM_IEEE:

746 case TargetOpcode::G_FMAXNUM_IEEE:

747 case TargetOpcode::G_FMINIMUM:

748 case TargetOpcode::G_FMAXIMUM:

749 case TargetOpcode::G_FADD:

750 case TargetOpcode::G_FSUB:

751 case TargetOpcode::G_FMUL:

752 case TargetOpcode::G_FDIV:

753 case TargetOpcode::G_FPOW:

754 return true;

755 default:

756 return false;

757 }

758 };

759};

760

761

763public:

765 switch (MI->getOpcode()) {

766 case TargetOpcode::G_AND:

767 case TargetOpcode::G_OR:

768 case TargetOpcode::G_XOR:

769 return true;

770 default:

771 return false;

772 }

773 };

774};

775

776

778public:

780 return MI->getOpcode() == TargetOpcode::G_ADD;

781 };

782};

783

784

786public:

788 return MI->getOpcode() == TargetOpcode::G_AND;

789 };

790};

791

792

794public:

796 return MI->getOpcode() == TargetOpcode::G_OR;

797 };

798};

799

800

802public:

805

807 return MI->getOpcode() == TargetOpcode::G_EXTRACT_VECTOR_ELT;

808 }

809};

810

811

813public:

817

819 return MI->getOpcode() == TargetOpcode::G_INSERT_VECTOR_ELT;

820 }

821};

822

823

825public:

828

830 return MI->getOpcode() == TargetOpcode::G_EXTRACT_SUBVECTOR;

831 }

832};

833

834

836public:

840

842 return MI->getOpcode() == TargetOpcode::G_INSERT_SUBVECTOR;

843 }

844};

845

846

848public:

850

852 return MI->getOpcode() == TargetOpcode::G_FREEZE;

853 }

854};

855

856

857

858

860public:

862

864 switch (MI->getOpcode()) {

865 case TargetOpcode::G_ADDRSPACE_CAST:

866 case TargetOpcode::G_FPEXT:

867 case TargetOpcode::G_FPTOSI:

868 case TargetOpcode::G_FPTOUI:

869 case TargetOpcode::G_FPTOSI_SAT:

870 case TargetOpcode::G_FPTOUI_SAT:

871 case TargetOpcode::G_FPTRUNC:

872 case TargetOpcode::G_INTTOPTR:

873 case TargetOpcode::G_PTRTOINT:

874 case TargetOpcode::G_SEXT:

875 case TargetOpcode::G_SITOFP:

876 case TargetOpcode::G_TRUNC:

877 case TargetOpcode::G_TRUNC_SSAT_S:

878 case TargetOpcode::G_TRUNC_SSAT_U:

879 case TargetOpcode::G_TRUNC_USAT_U:

880 case TargetOpcode::G_UITOFP:

881 case TargetOpcode::G_ZEXT:

882 case TargetOpcode::G_ANYEXT:

883 return true;

884 default:

885 return false;

886 }

887 };

888};

889

890

892public:

894 return MI->getOpcode() == TargetOpcode::G_SEXT;

895 };

896};

897

898

900public:

902 return MI->getOpcode() == TargetOpcode::G_ZEXT;

903 };

904};

905

906

908public:

910 return MI->getOpcode() == TargetOpcode::G_ANYEXT;

911 };

912};

913

914

916public:

918 return MI->getOpcode() == TargetOpcode::G_TRUNC;

919 };

920};

921

922

924public:

926

928 return MI->getOpcode() == TargetOpcode::G_VSCALE;

929 };

930};

931

932

934public:

938

940 return MI->getOpcode() == TargetOpcode::G_STEP_VECTOR;

941 };

942};

943

944

946public:

948 return MI->getOpcode() == TargetOpcode::G_SUB;

949 };

950};

951

952

954public:

956 return MI->getOpcode() == TargetOpcode::G_MUL;

957 };

958};

959

960

962public:

965

967 return MI->getOpcode() == TargetOpcode::G_SHL;

968 };

969};

970

971

973public:

976

978

980 switch (MI->getOpcode()) {

981 case TargetOpcode::G_SCMP:

982 case TargetOpcode::G_UCMP:

983 return true;

984 default:

985 return false;

986 }

987 };

988};

989

990

992public:

994 switch (MI->getOpcode()) {

995 case TargetOpcode::G_SEXT:

996 case TargetOpcode::G_ZEXT:

997 case TargetOpcode::G_ANYEXT:

998 return true;

999 default:

1000 return false;

1001 }

1002 };

1003};

1004

1005

1007public:

1009 switch (MI->getOpcode()) {

1010 case TargetOpcode::G_SEXT:

1011 case TargetOpcode::G_ZEXT:

1012 case TargetOpcode::G_ANYEXT:

1013 case TargetOpcode::G_TRUNC:

1014 return true;

1015 default:

1016 return false;

1017 }

1018 };

1019};

1020

1021

1023public:

1025

1027 return MI->getOpcode() == TargetOpcode::G_SPLAT_VECTOR;

1028 };

1029};

1030

1031}

1032

1033#endif

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

This file implements a class to represent arbitrary precision integral constant values and operations...

This file contains the declarations for the subclasses of Constant, which represent the different fla...

Class for arbitrary precision integers.

uint64_t getZExtValue() const

Get zero extended value.

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

Predicate

This enumeration lists the possible predicates for CmpInst subclasses.

const APInt & getValue() const

Return the constant as an APInt value reference.

Represents overflowing add operations.

Definition GenericMachineInstrs.h:477

bool isSigned() const

Definition GenericMachineInstrs.h:479

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:481

Represents overflowing add/sub operations that also consume a carry-in.

Definition GenericMachineInstrs.h:511

Definition GenericMachineInstrs.h:513

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:515

Represents overflowing add/sub operations.

Definition GenericMachineInstrs.h:430

bool isAdd() const

Definition GenericMachineInstrs.h:432

bool isSigned() const

Definition GenericMachineInstrs.h:445

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:458

bool isSub() const

Definition GenericMachineInstrs.h:443

bool isUnsigned() const

Definition GenericMachineInstrs.h:456

Represents an integer addition.

Definition GenericMachineInstrs.h:777

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:779

Represents a logical and.

Definition GenericMachineInstrs.h:785

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:787

Represent a G_ICMP or G_FCMP.

Definition GenericMachineInstrs.h:362

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:370

CmpInst::Predicate getCond() const

Definition GenericMachineInstrs.h:364

Definition GenericMachineInstrs.h:367

Definition GenericMachineInstrs.h:368

Represents an any ext.

Definition GenericMachineInstrs.h:907

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:909

Represents any generic load, including sign/zero extending variants.

Definition GenericMachineInstrs.h:185

Get the definition register of the loaded value.

Definition GenericMachineInstrs.h:188

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:195

const MDNode * getRanges() const

Returns the Ranges that describes the dereference.

Definition GenericMachineInstrs.h:191

Represents overflowing binary operations.

Definition GenericMachineInstrs.h:397

MachineOperand & getRHS()

Definition GenericMachineInstrs.h:402

MachineOperand & getLHS()

Definition GenericMachineInstrs.h:401

Definition GenericMachineInstrs.h:400

Definition GenericMachineInstrs.h:399

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:406

Definition GenericMachineInstrs.h:404

Definition GenericMachineInstrs.h:403

Represents a binary operation, i.e, x = y op z.

Definition GenericMachineInstrs.h:673

Definition GenericMachineInstrs.h:675

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:678

Definition GenericMachineInstrs.h:676

Represents a G_BUILD_VECTOR_TRUNC.

Definition GenericMachineInstrs.h:311

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:313

Represents a G_BUILD_VECTOR.

Definition GenericMachineInstrs.h:303

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:305

Represents a cast operation.

Definition GenericMachineInstrs.h:859

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:863

Definition GenericMachineInstrs.h:861

Represents a G_CONCAT_VECTORS.

Definition GenericMachineInstrs.h:295

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:297

Represents either a G_SEXTLOAD or G_ZEXTLOAD.

Definition GenericMachineInstrs.h:216

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:218

Represents an integer-like extending operation.

Definition GenericMachineInstrs.h:991

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:993

Represents an integer-like extending or truncating operation.

Definition GenericMachineInstrs.h:1006

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:1008

Represents a floating point binary operation.

Definition GenericMachineInstrs.h:739

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:741

Represent a G_FCMP.

Definition GenericMachineInstrs.h:385

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:387

Represents a freeze.

Definition GenericMachineInstrs.h:847

Definition GenericMachineInstrs.h:849

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:851

Represent a G_ICMP.

Definition GenericMachineInstrs.h:377

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:379

Represents a G_IMPLICIT_DEF.

Definition GenericMachineInstrs.h:342

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:344

Represents either G_INDEXED_LOAD, G_INDEXED_ZEXTLOAD or G_INDEXED_SEXTLOAD.

Definition GenericMachineInstrs.h:134

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:136

Represents a G_INDEX_ZEXTLOAD/G_INDEXED_SEXTLOAD.

Definition GenericMachineInstrs.h:125

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:127

Represents indexed loads.

Definition GenericMachineInstrs.h:105

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:119

Get the offset register of the pointer value.

Definition GenericMachineInstrs.h:114

bool isPost() const

Definition GenericMachineInstrs.h:117

Get the def register of the writeback value.

Definition GenericMachineInstrs.h:110

Get the definition register of the loaded value.

Definition GenericMachineInstrs.h:108

Get the base register of the pointer value.

Definition GenericMachineInstrs.h:112

bool isPre() const

Definition GenericMachineInstrs.h:116

Represents a G_SEXTLOAD.

Definition GenericMachineInstrs.h:157

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:159

Represents indexed stores.

Definition GenericMachineInstrs.h:165

Get the offset register of the pointer value.

Definition GenericMachineInstrs.h:174

Get the stored value register.

Definition GenericMachineInstrs.h:170

bool isPost() const

Definition GenericMachineInstrs.h:177

Get the base register of the pointer value.

Definition GenericMachineInstrs.h:172

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:179

bool isPre() const

Definition GenericMachineInstrs.h:176

Get the def register of the writeback value.

Definition GenericMachineInstrs.h:168

Represents a G_ZEXTLOAD.

Definition GenericMachineInstrs.h:149

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:151

Represents a insert subvector.

Definition GenericMachineInstrs.h:835

Definition GenericMachineInstrs.h:838

Definition GenericMachineInstrs.h:837

uint64_t getIndexImm() const

Definition GenericMachineInstrs.h:839

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:841

Represents an insert vector element.

Definition GenericMachineInstrs.h:812

Definition GenericMachineInstrs.h:814

Definition GenericMachineInstrs.h:816

Definition GenericMachineInstrs.h:815

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:818

Represents an integer binary operation.

Definition GenericMachineInstrs.h:716

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:718

Represents a call to an intrinsic.

Definition GenericMachineInstrs.h:529

bool isConvergent() const

Definition GenericMachineInstrs.h:547

Intrinsic::ID getIntrinsicID() const

Definition GenericMachineInstrs.h:531

bool is(Intrinsic::ID ID) const

Definition GenericMachineInstrs.h:535

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:557

bool hasSideEffects() const

Definition GenericMachineInstrs.h:537

Represents any type of generic load or store.

Definition GenericMachineInstrs.h:84

Get the source register of the pointer value.

Definition GenericMachineInstrs.h:87

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:89

Represents a G_LOAD.

Definition GenericMachineInstrs.h:208

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:210

Represents a logical binary operation.

Definition GenericMachineInstrs.h:762

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:764

Provides common memory operand functionality.

Definition GenericMachineInstrs.h:53

MachineMemOperand & getMMO() const

Get the MachineMemOperand on this instruction.

Definition GenericMachineInstrs.h:56

LocationSize getMemSize() const

Returns the size in bytes of the memory access.

Definition GenericMachineInstrs.h:73

bool isUnordered() const

Returns true if this memory operation doesn't have any ordering constraints other than normal aliasin...

Definition GenericMachineInstrs.h:67

bool isAtomic() const

Returns true if the attached MachineMemOperand has the atomic flag set.

Definition GenericMachineInstrs.h:59

Align getAlign() const

Return the minimum known alignment in bytes of the actual memory reference.

Definition GenericMachineInstrs.h:71

bool isVolatile() const

Returns true if the attached MachineMemOpeand as the volatile flag set.

Definition GenericMachineInstrs.h:61

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:77

LocationSize getMemSizeInBits() const

Returns the size in bits of the memory access.

Definition GenericMachineInstrs.h:75

bool isSimple() const

Returns true if the memory operation is neither atomic or volatile.

Definition GenericMachineInstrs.h:63

Represents G_BUILD_VECTOR, G_CONCAT_VECTORS or G_MERGE_VALUES.

Definition GenericMachineInstrs.h:267

Returns the I'th source register.

Definition GenericMachineInstrs.h:272

unsigned getNumSources() const

Returns the number of source registers.

Definition GenericMachineInstrs.h:270

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:274

Represents a G_MERGE_VALUES.

Definition GenericMachineInstrs.h:287

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:289

Represents an integer multiplication.

Definition GenericMachineInstrs.h:953

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:955

Represents a logical or.

Definition GenericMachineInstrs.h:793

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:795

Represents a G_PHI.

Definition GenericMachineInstrs.h:654

MachineBasicBlock * getIncomingBlock(unsigned I) const

Returns the I'th incoming basic block.

Definition GenericMachineInstrs.h:663

Returns the I'th incoming vreg.

Definition GenericMachineInstrs.h:659

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:667

unsigned getNumIncomingValues() const

Returns the number of incoming values.

Definition GenericMachineInstrs.h:657

Represents a G_PTR_ADD.

Definition GenericMachineInstrs.h:331

Definition GenericMachineInstrs.h:334

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:336

Definition GenericMachineInstrs.h:333

Represents a G_SEXTLOAD.

Definition GenericMachineInstrs.h:225

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:227

Represents a threeway compare.

Definition GenericMachineInstrs.h:972

Definition GenericMachineInstrs.h:975

bool isSigned() const

Definition GenericMachineInstrs.h:977

Definition GenericMachineInstrs.h:974

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:979

Represents a G_SELECT.

Definition GenericMachineInstrs.h:350

Definition GenericMachineInstrs.h:352

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:356

Definition GenericMachineInstrs.h:354

Definition GenericMachineInstrs.h:353

Represents a sext.

Definition GenericMachineInstrs.h:891

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:893

Represents a shift left.

Definition GenericMachineInstrs.h:961

Definition GenericMachineInstrs.h:964

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:966

Definition GenericMachineInstrs.h:963

Represents a G_SHUFFLE_VECTOR.

Definition GenericMachineInstrs.h:319

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:325

Definition GenericMachineInstrs.h:322

Definition GenericMachineInstrs.h:321

ArrayRef< int > getMask() const

Definition GenericMachineInstrs.h:323

Represents a splat vector.

Definition GenericMachineInstrs.h:1022

Definition GenericMachineInstrs.h:1024

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:1026

Represents a step vector.

Definition GenericMachineInstrs.h:933

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:939

uint64_t getStep() const

Definition GenericMachineInstrs.h:935

Represents a G_STORE.

Definition GenericMachineInstrs.h:241

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:246

Get the stored value register.

Definition GenericMachineInstrs.h:244

Represents overflowing sub operations.

Definition GenericMachineInstrs.h:494

bool isSigned() const

Definition GenericMachineInstrs.h:496

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:498

Represents an integer subtraction.

Definition GenericMachineInstrs.h:945

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:947

Represents a trunc.

Definition GenericMachineInstrs.h:915

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:917

Represents a G_UNMERGE_VALUES.

Definition GenericMachineInstrs.h:252

unsigned getNumDefs() const

Returns the number of def registers.

Definition GenericMachineInstrs.h:255

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:259

Get the unmerge source register.

Definition GenericMachineInstrs.h:257

Represents a vscale.

Definition GenericMachineInstrs.h:923

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:927

APInt getSrc() const

Definition GenericMachineInstrs.h:925

unsigned getScalarOpcForReduction()

Get the opcode for the equivalent scalar operation for this reduction.

Definition GenericMachineInstrs.h:598

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:573

Represents a G_ZEXTLOAD.

Definition GenericMachineInstrs.h:233

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:235

Represents a zext.

Definition GenericMachineInstrs.h:899

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:901

static bool classof(const MachineInstr *MI)

Definition GenericMachineInstrs.h:40

Access the Idx'th operand as a register and return it.

Definition GenericMachineInstrs.h:38

bool hasPoisonGeneratingFlags() const

Definition GenericMachineInstrs.h:44

void dropPoisonGeneratingFlags()

Definition GenericMachineInstrs.h:46

GenericMachineInstr()=delete

Representation of each machine instruction.

unsigned getOpcode() const

Returns the opcode of this MachineInstr.

unsigned getNumOperands() const

Retuns the total number of operands.

void clearFlags(unsigned flags)

LLVM_ABI unsigned getNumExplicitDefs() const

Returns the number of non-implicit definitions.

mmo_iterator memoperands_begin() const

Access to memory operands of the instruction.

const MachineOperand & getOperand(unsigned i) const

uint32_t getFlags() const

Return the MI flags bitvector.

A description of a memory reference used in the backend.

LocationSize getSize() const

Return the size in bytes of the memory reference.

bool isUnordered() const

Returns true if this memory operation doesn't have any ordering constraints other than normal aliasin...

const MDNode * getRanges() const

Return the range tag for the memory reference.

bool isAtomic() const

Returns true if this operation has an atomic ordering requirement of unordered or higher,...

LLVM_ABI Align getAlign() const

Return the minimum known alignment in bytes of the actual memory reference.

LocationSize getSizeInBits() const

Return the size in bits of the memory reference.

MachineOperand class - Representation of each machine instruction operand.

const ConstantInt * getCImm() const

MachineBasicBlock * getMBB() const

ArrayRef< int > getShuffleMask() const

getReg - Returns the register number.

Intrinsic::ID getIntrinsicID() const

unsigned getPredicate() const

Wrapper class representing virtual and physical registers.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

This is an optimization pass for GlobalISel generic memory operations.

bool isPreISelGenericOpcode(unsigned Opcode)

Check whether the given Opcode is a generic opcode that is not supposed to appear after ISel.

This struct is a compact representation of a valid (non-zero power of two) alignment.