LLVM: lib/Target/Hexagon/HexagonBitTracker.h Source File (original) (raw)

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9#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H

10#define LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H

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15namespace llvm {

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49private:

50 unsigned getUniqueDefVReg(const MachineInstr &MI) const;

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56 unsigned getNextPhysReg(unsigned PReg, unsigned Width) const;

57 unsigned getVirtRegFor(unsigned PReg) const;

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60 struct ExtType {

61 enum { SExt, ZExt };

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63 ExtType() = default;

64 ExtType(char t, uint16_t w) : Type(t), Width(w) {}

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66 char Type = 0;

68 };

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70 using RegExtMap = DenseMap<unsigned, ExtType>;

71 RegExtMap VRX;

72};

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74}

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76#endif

This file defines the DenseMap class.

Wrapper class representing physical registers. Should be passed by value.

The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.

Representation of each machine instruction.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

Wrapper class representing virtual and physical registers.

The instances of the Type class are immutable: once they are created, they are never changed.

This is an optimization pass for GlobalISel generic memory operations.

@ Sub

Subtraction of integers.

SetVector< const MachineBasicBlock * > BranchTargetList

std::map< unsigned, RegisterCell > CellMapType

BitTracker::BitMask mask(Register Reg, unsigned Sub) const override

uint16_t getPhysRegBitWidth(MCRegister Reg) const override

BitTracker::BranchTargetList BranchTargetList

Definition HexagonBitTracker.h:28

bool evaluate(const MachineInstr &MI, const CellMapType &Inputs, CellMapType &Outputs) const override

HexagonEvaluator(const HexagonRegisterInfo &tri, MachineRegisterInfo &mri, const HexagonInstrInfo &tii, MachineFunction &mf)

MachineFrameInfo & MFI

Definition HexagonBitTracker.h:46

BitTracker::RegisterCell RegisterCell

Definition HexagonBitTracker.h:27

const HexagonInstrInfo & TII

Definition HexagonBitTracker.h:47

MachineFunction & MF

Definition HexagonBitTracker.h:45

const TargetRegisterClass & composeWithSubRegIndex(const TargetRegisterClass &RC, unsigned Idx) const override

BitTracker::CellMapType CellMapType

Definition HexagonBitTracker.h:25

BitTracker::RegisterRef RegisterRef

Definition HexagonBitTracker.h:26