HexagonBlockRanges.cpp Source File (original) (raw)

23#include

24#include

25#include

26#include

28using namespace llvm;

30#define DEBUG_TYPE "hbr"

35 if (AS == S)

36 return true;

37 bool SbAE = (S < AE) || (S == AE && A.TiedEnd);

38 bool ASbE = (AS < E) || (AS == E && TiedEnd);

39 if ((AS < S && SbAE) || (S < AS && ASbE))

40 return true;

42 return false;

43}

46 if (start() <= A.start()) {

50 if (AE <= E)

51 return true;

52 }

53 return false;

54}

61 setStart(AS);

63 setEnd(AE);

65 } else {

66 if (end() == AE)

68 }

69 if (A.Fixed)

71}

74 for (const auto &R : RL)

76 push_back(R);

77}

82 if (empty())

83 return;

88 while (Iter != end()-1) {

92 bool Merge = MergeAdjacent && (Iter->end() == Next->start());

93 if (Merge || Iter->overlaps(*Next)) {

94 Iter->merge(*Next);

96 continue;

97 }

98 ++Iter;

99 }

100}

101

102

103void HexagonBlockRanges::RangeList::addsub(const IndexRange &A,

105

106

107 if (.overlaps(B)) {

108

109 add(A);

110 return;

111 }

112

113 IndexType AS = A.start(), AE = A.end();

114 IndexType BS = B.start(), BE = B.end();

115

116

117

119 return;

120

121 if (AS < BS) {

122

123

125

126 add(AS, BS, A.Fixed, false);

127 }

128

129 if (BE < AE) {

130

132 add(BS, AE, A.Fixed, false);

133 else

134 add(BE, AE, A.Fixed, false);

135 }

136}

137

138

140

141

148 } else {

149 Next = std::next(I);

150 }

151 }

153}

154

156 : Block(B) {

159 for (auto &In : B) {

160 if (In.isDebugInstr())

161 continue;

163 Map.insert(std::make_pair(Idx, &In));

164 ++Idx;

165 }

167}

168

170 auto F = Map.find(Idx);

171 return (F != Map.end()) ? F->second : nullptr;

172}

173

176 for (const auto &I : Map)

177 if (I.second == MI)

178 return I.first;

180}

181

189 if (Idx == First)

192}

193

203

206 for (auto &I : Map) {

207 if (I.second != OldMI)

208 continue;

209 if (NewMI != nullptr)

210 I.second = NewMI;

211 else

212 Map.erase(I.first);

213 break;

214 }

215}

216

219 TII(*HST.getInstrInfo()), TRI(*HST.getRegisterInfo()),

220 Reserved(TRI.getReservedRegs(mf)) {

221

223 if (RC->isAllocatable())

224 continue;

225 for (unsigned R : *RC)

226 Reserved[R] = true;

227 }

228}

229

233 RegisterSet LiveIns;

234 RegisterSet Tmp;

235

236 for (auto I : B.liveins()) {

238 if (I.LaneMask.all() || (I.LaneMask.any() && !S.isValid())) {

239 Tmp.insert({I.PhysReg, 0});

240 continue;

241 }

242 for (; S.isValid(); ++S) {

243 unsigned SI = S.getSubRegIndex();

244 if ((I.LaneMask & TRI.getSubRegIndexLaneMask(SI)).any())

245 Tmp.insert({S.getSubReg(), 0});

246 }

247 }

248

249 for (auto R : Tmp) {

250 if (!Reserved[R.Reg])

251 LiveIns.insert(R);

253 if (!Reserved[S.Reg])

254 LiveIns.insert(S);

255 }

256 return LiveIns;

257}

258

263

264 if (R.Sub != 0) {

265 SRs.insert(R);

266 return SRs;

267 }

268

269 if (R.Reg.isPhysical()) {

270 if (TRI.subregs(R.Reg).empty())

271 SRs.insert({R.Reg, 0});

272 for (MCPhysReg I : TRI.subregs(R.Reg))

273 SRs.insert({I, 0});

274 } else {

275 assert(R.Reg.isVirtual());

276 auto &RC = *MRI.getRegClass(R.Reg);

277 unsigned PReg = *RC.begin();

279 if (.isValid())

280 SRs.insert({R.Reg, 0});

281 for (; I.isValid(); ++I)

282 SRs.insert({R.Reg, I.getSubRegIndex()});

283 }

284 return SRs;

285}

286

287void HexagonBlockRanges::computeInitialLiveRanges(InstrIndexMap &IndexMap,

288 RegToRangeMap &LiveMap) {

289 std::map<RegisterRef,IndexType> LastDef, LastUse;

290 RegisterSet LiveOnEntry;

293

294 for (auto R : getLiveIns(B, MRI, TRI))

295 LiveOnEntry.insert(R);

296

297 for (auto R : LiveOnEntry)

299

300 auto closeRange = [&LastUse,&LastDef,&LiveMap] (RegisterRef R) -> void {

301 auto LD = LastDef[R], LU = LastUse[R];

306 LiveMap[R].add(LD, LU, false, false);

308 };

309

310 RegisterSet Defs, Clobbers;

311

312 for (auto &In : B) {

313 if (In.isDebugInstr())

314 continue;

315 IndexType Index = IndexMap.getIndex(&In);

316

317 for (auto &Op : In.operands()) {

318 if (.isReg() || .isUse() || Op.isUndef())

319 continue;

320 RegisterRef R = { Op.getReg(), Op.getSubReg() };

321 if (R.Reg.isPhysical() && Reserved[R.Reg])

322 continue;

323 bool IsKill = Op.isKill();

325 LastUse[S] = Index;

326 if (IsKill)

327 closeRange(S);

328 }

329 }

330

331 Defs.clear();

332 Clobbers.clear();

333 for (auto &Op : In.operands()) {

334 if (.isReg() || .isDef() || Op.isUndef())

335 continue;

338 if (S.Reg.isPhysical() && Reserved[S.Reg])

339 continue;

340 if (Op.isDead())

341 Clobbers.insert(S);

342 else

343 Defs.insert(S);

344 }

345 }

346

347 for (auto &Op : In.operands()) {

348 if (.isRegMask())

349 continue;

350 const uint32_t *BM = Op.getRegMask();

351 for (unsigned PR = 1, N = TRI.getNumRegs(); PR != N; ++PR) {

352

353

354

355 if (!TRI.subregs(PR).empty())

356 continue;

357 if (Reserved[PR])

358 continue;

359 if (BM[PR/32] & (1u << (PR%32)))

360 continue;

362 if (!Defs.count(R))

363 Clobbers.insert(R);

364 }

365 }

366

367

369 Clobbers.erase(R);

370

371

373

374 assert(!S.Reg.isPhysical() || TRI.subregs(S.Reg).empty());

376 closeRange(S);

377 LastDef[S] = Index;

378 }

379

381

382 assert(!S.Reg.isPhysical() || TRI.subregs(S.Reg).empty());

384 closeRange(S);

385

386 LastDef[S] = LastUse[S] = Index;

387 closeRange(S);

388 }

389 }

390

391

393 for (auto *SB : B.successors())

394 for (auto R : getLiveIns(*SB, MRI, TRI))

395 LiveOnExit.insert(R);

396

397 for (auto R : LiveOnExit)

399

400

402 for (auto &I : LastUse)

404 Left.insert(I.first);

405 for (auto &I : LastDef)

407 Left.insert(I.first);

408 for (auto R : Left)

409 closeRange(R);

410

411

412 for (auto &P : LiveMap)

413 P.second.unionize();

414}

415

419 LLVM_DEBUG(dbgs() << __func__ << ": index map\n" << IndexMap << '\n');

420 computeInitialLiveRanges(IndexMap, LiveMap);

423 return LiveMap;

424}

425

429

430 auto addDeadRanges = [&IndexMap,&LiveMap,&DeadMap] (RegisterRef R) -> void {

431 auto F = LiveMap.find(R);

432 if (F == LiveMap.end() || F->second.empty()) {

434 return;

435 }

436

438 RangeList::iterator A = RL.begin(), Z = RL.end()-1;

439

440

445 }

446

447 while (A != Z) {

448

449

452 ++A;

454 if (DS < DE)

455 DeadMap[R].add(DS, DE, false, false);

456 }

457

458

464 }

465 };

466

468 auto &MRI = MF.getRegInfo();

469 unsigned NumRegs = TRI.getNumRegs();

471 for (unsigned R = 1; R < NumRegs; ++R) {

473 if (Reserved[S.Reg] || Visited[S.Reg])

474 continue;

475 addDeadRanges(S);

476 Visited[S.Reg] = true;

477 }

478 }

479 for (auto &P : LiveMap)

480 if (P.first.Reg.isVirtual())

481 addDeadRanges(P.first);

482

485 return DeadMap;

486}

487

491 return OS << '-';

493 return OS << 'n';

495 return OS << 'x';

497}

498

499

502 OS << '[' << IR.start() << ':' << IR.end() << (IR.TiedEnd ? '}' : ']');

503 if (IR.Fixed)

504 OS << '!';

505 return OS;

506}

507

510 for (const auto &R : RL)

511 OS << R << " ";

512 return OS;

513}

514

517 for (auto &In : M.Block) {

519 OS << Idx << (Idx == M.Last ? ". " : " ") << In;

520 }

521 return OS;

522}

523

526 for (const auto &I : P.Map) {

528 OS << printReg(I.first.Reg, &P.TRI, I.first.Sub) << " -> " << RL << "\n";

529 }

530 return OS;

531}

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

This file implements the BitVector class.

static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")

static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")

Legalize the Machine IR a function s Machine IR

ConstantRange Range(APInt(BitWidth, Low), APInt(BitWidth, High))

void merge(const IndexRange &A)

Definition HexagonBlockRanges.cpp:56

bool overlaps(const IndexRange &A) const

Definition HexagonBlockRanges.cpp:32

bool contains(const IndexRange &A) const

Definition HexagonBlockRanges.cpp:45

void replaceInstr(MachineInstr *OldMI, MachineInstr *NewMI)

Definition HexagonBlockRanges.cpp:204

MachineBasicBlock & getBlock() const

IndexType getNextIndex(IndexType Idx) const

Definition HexagonBlockRanges.cpp:194

IndexType getPrevIndex(IndexType Idx) const

Definition HexagonBlockRanges.cpp:182

IndexType getIndex(MachineInstr *MI) const

Definition HexagonBlockRanges.cpp:174

InstrIndexMap(MachineBasicBlock &B)

Definition HexagonBlockRanges.cpp:155

MachineInstr * getInstr(IndexType Idx) const

Definition HexagonBlockRanges.cpp:169

void subtract(const IndexRange &Range)

Definition HexagonBlockRanges.cpp:139

void include(const RangeList &RL)

Definition HexagonBlockRanges.cpp:73

void unionize(bool MergeAdjacent=false)

Definition HexagonBlockRanges.cpp:81

Iterator that enumerates the sub-registers of a Reg and the associated sub-register indices.

const MachineFunction * getParent() const

Return the MachineFunction containing this basic block.

Representation of each machine instruction.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

This class implements an extremely fast bulk output stream that can only output to a stream.

This is an optimization pass for GlobalISel generic memory operations.

void erase(Container &C, ValueType V)

Wrapper function to remove a value from a container:

void sort(IteratorTy Start, IteratorTy End)

LLVM_ABI raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

uint16_t MCPhysReg

An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...

FunctionAddr VTableAddr Next

DWARFExpression::Operation Op

raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)

bool is_contained(R &&Range, const E &Element)

Returns true if Element is found in Range.

LLVM_ABI Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)

Prints virtual and physical registers with or without a TRI instance.

RegToRangeMap computeLiveMap(InstrIndexMap &IndexMap)

Definition HexagonBlockRanges.cpp:416

std::set< RegisterRef > RegisterSet

static RegisterSet expandToSubRegs(RegisterRef R, const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI)

Definition HexagonBlockRanges.cpp:259

RegToRangeMap computeDeadMap(InstrIndexMap &IndexMap, RegToRangeMap &LiveMap)

Definition HexagonBlockRanges.cpp:426

HexagonBlockRanges(MachineFunction &MF)

Definition HexagonBlockRanges.cpp:217

std::map< RegisterRef, RangeList > RegToRangeMap