LLVM: lib/Target/Hexagon/HexagonBlockRanges.h Source File (original) (raw)
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9#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONBLOCKRANGES_H
10#define LLVM_LIB_TARGET_HEXAGON_HEXAGONBLOCKRANGES_H
11
14#include
15#include
16#include
17#include
18#include
19
20namespace llvm {
21
30
33
34
38
40 return std::tie(Reg, Sub) < std::tie(R.Reg, R.Sub);
41 }
42 };
44
45
46
48 public:
49 enum : unsigned {
54 };
55
58
60
67 bool operator< (unsigned Idx) const;
70
71 private:
72 bool operator> (IndexType Idx) const;
73 bool operator>= (IndexType Idx) const;
74
75 unsigned Index = None;
76 };
77
78
79
80
81 class IndexRange : public std::pair<IndexType,IndexType> {
82 public:
86
89
91 return start() < A.start();
92 }
93
97
100
101 private:
102 void setStart(const IndexType &S) { first = S; }
103 void setEnd(const IndexType &E) { second = E; }
104 };
105
106
107
108 class RangeList : public std::vector {
109 public:
114 push_back(Range);
115 }
116
118 void unionize(bool MergeAdjacent = false);
120
121 private:
123 };
124
126 public:
128
135
137
139
140 private:
142 std::map<IndexType,MachineInstr*> Map;
143 };
144
146
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155
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158 private:
161 };
162
163private:
166
167 void computeInitialLiveRanges(InstrIndexMap &IndexMap,
169
175};
176
177inline HexagonBlockRanges::IndexType::operator unsigned() const {
179 return Index;
180}
181
183 return Index == x;
184}
185
187 return Index == Idx.Index;
188}
189
191 return Index != x;
192}
193
195 return Index != Idx.Index;
196}
197
198inline
202 if (Index == Entry)
204 else
205 ++Index;
206 return *this;
207}
208
212
214
215 if (Index == Idx.Index)
216 return false;
217
218
219 if (Index == None || Idx.Index == None)
220 return false;
221
222
223 if (Index == Exit || Idx.Index == Entry)
224 return false;
225
226
227 if (Index == Entry || Idx.Index == Exit)
228 return true;
229
230 return Index < Idx.Index;
231}
232
236
246
247}
248
249#endif
unsigned const MachineRegisterInfo * MRI
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
This file implements the BitVector class.
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
Legalize the Machine IR a function s Machine IR
ConstantRange Range(APInt(BitWidth, Low), APInt(BitWidth, High))
static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")
IndexType start() const
Definition HexagonBlockRanges.h:87
void merge(const IndexRange &A)
IndexRange(IndexType Start, IndexType End, bool F=false, bool T=false)
Definition HexagonBlockRanges.h:84
bool operator<(const IndexRange &A) const
Definition HexagonBlockRanges.h:90
bool overlaps(const IndexRange &A) const
bool TiedEnd
Definition HexagonBlockRanges.h:99
bool contains(const IndexRange &A) const
IndexType end() const
Definition HexagonBlockRanges.h:88
bool Fixed
Definition HexagonBlockRanges.h:98
bool operator==(unsigned x) const
Definition HexagonBlockRanges.h:182
static bool isInstr(IndexType X)
Definition HexagonBlockRanges.h:59
@ Entry
Definition HexagonBlockRanges.h:51
@ Exit
Definition HexagonBlockRanges.h:52
@ First
Definition HexagonBlockRanges.h:53
@ None
Definition HexagonBlockRanges.h:50
IndexType()
Definition HexagonBlockRanges.h:56
bool operator<=(IndexType Idx) const
Definition HexagonBlockRanges.h:233
bool operator<(unsigned Idx) const
Definition HexagonBlockRanges.h:209
IndexType operator++()
Definition HexagonBlockRanges.h:199
IndexType(unsigned Idx)
Definition HexagonBlockRanges.h:57
bool operator!=(unsigned x) const
Definition HexagonBlockRanges.h:190
void replaceInstr(MachineInstr *OldMI, MachineInstr *NewMI)
MachineBasicBlock & getBlock() const
Definition HexagonBlockRanges.h:131
IndexType First
Definition HexagonBlockRanges.h:138
IndexType getNextIndex(IndexType Idx) const
IndexType getPrevIndex(IndexType Idx) const
IndexType Last
Definition HexagonBlockRanges.h:138
IndexType getIndex(MachineInstr *MI) const
InstrIndexMap(MachineBasicBlock &B)
MachineInstr * getInstr(IndexType Idx) const
friend raw_ostream & operator<<(raw_ostream &OS, const InstrIndexMap &Map)
void add(const IndexRange &Range)
Definition HexagonBlockRanges.h:113
void subtract(const IndexRange &Range)
void include(const RangeList &RL)
void unionize(bool MergeAdjacent=false)
void add(IndexType Start, IndexType End, bool Fixed, bool TiedEnd)
Definition HexagonBlockRanges.h:110
Representation of each machine instruction.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Wrapper class representing virtual and physical registers.
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This class implements an extremely fast bulk output stream that can only output to a stream.
This is an optimization pass for GlobalISel generic memory operations.
bool operator<(int64_t V1, const APSInt &V2)
bool operator==(const AddressRangeValuePair &LHS, const AddressRangeValuePair &RHS)
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
Implement std::hash so that hash_code can be used in STL containers.
PrintRangeMap(const RegToRangeMap &M, const TargetRegisterInfo &I)
Definition HexagonBlockRanges.h:153
friend raw_ostream & operator<<(raw_ostream &OS, const PrintRangeMap &P)
bool operator<(RegisterRef R) const
Definition HexagonBlockRanges.h:39
unsigned Sub
Definition HexagonBlockRanges.h:37
llvm::Register Reg
Definition HexagonBlockRanges.h:36
RegToRangeMap computeLiveMap(InstrIndexMap &IndexMap)
std::set< RegisterRef > RegisterSet
Definition HexagonBlockRanges.h:43
static RegisterSet expandToSubRegs(RegisterRef R, const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI)
RegToRangeMap computeDeadMap(InstrIndexMap &IndexMap, RegToRangeMap &LiveMap)
HexagonBlockRanges(MachineFunction &MF)
std::map< RegisterRef, RangeList > RegToRangeMap
Definition HexagonBlockRanges.h:145