HexagonFrameLowering.h Source File (original) (raw)

9#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H

10#define LLVM_LIB_TARGET_HEXAGON_HEXAGONFRAMELOWERING_H

19#include

21namespace llvm {

32public:

38 void

46 override;

59 bool

75 return true;

76 }

91 Register &FrameReg) const override;

94 const override {

95 static const SpillSlot Offsets[] = {

96 { Hexagon::R17, -4 }, { Hexagon::R16, -8 }, { Hexagon::D8, -8 },

97 { Hexagon::R19, -12 }, { Hexagon::R18, -16 }, { Hexagon::D9, -16 },

98 { Hexagon::R21, -20 }, { Hexagon::R20, -24 }, { Hexagon::D10, -24 },

99 { Hexagon::R23, -28 }, { Hexagon::R22, -32 }, { Hexagon::D11, -32 },

100 { Hexagon::R25, -36 }, { Hexagon::R24, -40 }, { Hexagon::D12, -40 },

101 { Hexagon::R27, -44 }, { Hexagon::R26, -48 }, { Hexagon::D13, -48 }

102 };

103 NumEntries = std::size(Offsets);

104 return Offsets;

105 }

106

109 const override;

110

113

115

116protected:

118

119private:

120 using CSIVect = std::vector;

121

123 Register SP, unsigned CF) const;

124 void insertPrologueInBlock(MachineBasicBlock &MBB, bool PrologueStubs) const;

137

167

174

177

178 void addCalleeSaveRegistersAsImpOperand(MachineInstr *MI, const CSIVect &CSI,

179 bool IsDef, bool IsKill) const;

180 bool shouldInlineCSR(const MachineFunction &MF, const CSIVect &CSI) const;

181 bool useSpillFunction(const MachineFunction &MF, const CSIVect &CSI) const;

182 bool useRestoreFunction(const MachineFunction &MF, const CSIVect &CSI) const;

184};

185

186}

187

188#endif

unsigned const MachineRegisterInfo * MRI

const TargetInstrInfo & TII

static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")

ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...

const MachineInstr * getAlignaInstr(const MachineFunction &MF) const

void insertCFIInstructions(MachineFunction &MF) const

bool hasFPImpl(const MachineFunction &MF) const override

bool enableCalleeSaveSkip(const MachineFunction &MF) const override

Returns true if the target can safely skip saving callee-saved registers for noreturn nounwind functi...

bool targetHandlesStackFrameRounding() const override

targetHandlesStackFrameRounding - Returns true if the target is responsible for rounding up the stack...

Definition HexagonFrameLowering.h:86

MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override

This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...

HexagonFrameLowering()

Definition HexagonFrameLowering.h:35

int FirstVarArgSavedReg

Definition HexagonFrameLowering.h:34

bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override

canSimplifyCallFramePseudos - When possible, it's best to simplify the call frame pseudo ops before d...

Definition HexagonFrameLowering.h:72

StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override

getFrameIndexReference - This method should return the base register and offset used to reference a f...

void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override

Perform most of the PEI work here:

void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override

This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...

void orderFrameObjects(const MachineFunction &MF, SmallVectorImpl< int > &ObjectsToAllocate) const override

Order the symbols in the local stack frame.

void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS=nullptr) const override

processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...

const SpillSlot * getCalleeSavedSpillSlots(unsigned &NumEntries) const override

getCalleeSavedSpillSlots - This method returns a pointer to an array of pairs, that contains an entry...

Definition HexagonFrameLowering.h:93

bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override

spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...

Definition HexagonFrameLowering.h:52

void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override

Definition HexagonFrameLowering.h:47

bool needsAligna(const MachineFunction &MF) const

bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override

assignCalleeSavedSpillSlots - Allows target to override spill slot assignment logic.

bool hasReservedCallFrame(const MachineFunction &MF) const override

hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...

Definition HexagonFrameLowering.h:67

bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override

restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...

Definition HexagonFrameLowering.h:60

MachineInstrBundleIterator< MachineInstr > iterator

Representation of each machine instruction.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...

Wrapper class representing virtual and physical registers.

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

StackOffset holds a fixed and a scalable offset in bytes.

TargetFrameLowering(StackDirection D, Align StackAl, int LAO, Align TransAl=Align(1), bool StackReal=true)

TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...

This is an optimization pass for GlobalISel generic memory operations.

This struct is a compact representation of a valid (non-zero power of two) alignment.

std::map< RegisterRef, RangeList > RegToRangeMap