HexagonMCInstrInfo.h Source File (original) (raw)

13#ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H

14#define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H

22#include

23#include

25namespace llvm {

43namespace Hexagon {

47 PacketIterator, std::forward_iterator_tag, const MCInst> {

54public:

61};

63}

102 bool AttemptCompatibility = false);

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108 MCInst const &inst1);

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203template <unsigned N, unsigned S>

207template <unsigned N, unsigned S>

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277 bool ExtendedA, MCInst const &MIb, bool ExtendedB,

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380}

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384#endif

unsigned const MachineRegisterInfo * MRI

This file defines the SmallVector class.

unsigned iClass

Definition HexagonMCInstrInfo.h:37

unsigned packetIndexJ

Definition HexagonMCInstrInfo.h:37

DuplexCandidate(unsigned i, unsigned j, unsigned iClass)

Definition HexagonMCInstrInfo.h:39

unsigned packetIndexI

Definition HexagonMCInstrInfo.h:37

Check for a valid bundle.

bool PredicatedTrue

Definition HexagonMCInstrInfo.h:342

unsigned Operand

Definition HexagonMCInstrInfo.h:341

PredicateInfo()

Definition HexagonMCInstrInfo.h:336

PredicateInfo(MCRegister Register, unsigned Operand, bool PredicatedTrue)

Definition HexagonMCInstrInfo.h:337

MCRegister Register

Definition HexagonMCInstrInfo.h:340

bool isPredicated() const

bool operator==(PacketIterator const &Other) const

PacketIterator & operator++()

MCInst const & operator*() const

PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst)

Context object for machine code objects.

Base class for the full range of assembler expressions which are needed for parsing.

Instances of this class represent a single low-level machine instruction.

SmallVectorImpl< MCOperand >::const_iterator const_iterator

Describe properties that are true of each instruction in the target description file.

Interface to description of machine instruction set.

Instances of this class represent operands of the MCInst class.

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...

Wrapper class representing physical registers. Should be passed by value.

Generic base class for all target subtargets.

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

StringRef - Represent a constant reference to a string, i.e.

LLVM Value Representation.

CRTP base class which implements the entire standard iterator facade in terms of a minimal subset of ...

A range adaptor for a pair of iterators.

This provides a very simple, boring adaptor for a begin and end iterator into a range type.

std::pair< unsigned, unsigned > GetVecRegPairIndices(MCRegister VecRegPair)

Returns an ordered pair of the constituent register ordinals for each of the elements of VecRegPair.

bool isOrderedDuplexPair(MCInstrInfo const &MCII, MCInst const &MIa, bool ExtendedA, MCInst const &MIb, bool ExtendedB, bool bisReversable, MCSubtargetInfo const &STI)

non-Symmetrical. See if these two instructions are fit for duplex pair.

bool isDuplexPairMatch(unsigned Ga, unsigned Gb)

bool subInstWouldBeExtended(MCInst const &potentialDuplex)

bool isExtentSigned(MCInstrInfo const &MCII, MCInst const &MCI)

MCInst deriveSubInst(MCInst const &Inst)

bool hasHvxTmp(MCInstrInfo const &MCII, MCInst const &MCI)

bool isRestrictSlot1AOK(MCInstrInfo const &MCII, MCInst const &MCI)

Return whether the insn can be packaged only with an A-type insn in slot #1.

bool isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI)

void setOuterLoop(MCInst &MCI)

bool isIntReg(MCRegister Reg)

void addConstant(MCInst &MI, uint64_t Value, MCContext &Context)

unsigned getMemAccessSize(MCInstrInfo const &MCII, MCInst const &MCI)

bool isSolo(MCInstrInfo const &MCII, MCInst const &MCI)

Return whether the insn is solo, i.e., cannot be in a packet.

SmallVector< DuplexCandidate, 8 > getDuplexPossibilties(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCB)

bool isPredicatedNew(MCInstrInfo const &MCII, MCInst const &MCI)

Return whether the insn is newly predicated.

bool IsReverseVecRegPair(MCRegister VecReg)

bool isOuterLoop(MCInst const &MCI)

bool inRange(MCInst const &MCI, size_t Index)

Definition HexagonMCInstrInfo.h:204

MCInst * deriveDuplex(MCContext &Context, unsigned iClass, MCInst const &inst0, MCInst const &inst1)

unsigned getAddrMode(MCInstrInfo const &MCII, MCInst const &MCI)

size_t bundleSize(MCInst const &MCI)

bool IsABranchingInst(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &I)

bool isDuplex(MCInstrInfo const &MCII, MCInst const &MCI)

unsigned getCVIResources(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI)

Return the resources used by this instruction.

void padEndloop(MCInst &MCI, MCContext &Context)

constexpr int64_t memReorderDisabledMask

Definition HexagonMCInstrInfo.h:76

bool isPrefix(MCInstrInfo const &MCII, MCInst const &MCI)

bool IsSingleConsumerRefPairProducer(MCRegister Producer, MCRegister Consumer)

bool isPredicateLate(MCInstrInfo const &MCII, MCInst const &MCI)

void setS27_2_reloc(MCExpr const &Expr, bool Val=true)

unsigned getExtentBits(MCInstrInfo const &MCII, MCInst const &MCI)

unsigned short getNewValueOp2(MCInstrInfo const &MCII, MCInst const &MCI)

Return the new value or the newly produced value.

bool inSRange(MCInst const &MCI, size_t Index)

Definition HexagonMCInstrInfo.h:208

bool isSoloAX(MCInstrInfo const &MCII, MCInst const &MCI)

Return whether the insn can be packaged only with A and X-type insns.

bool isNewValue(MCInstrInfo const &MCII, MCInst const &MCI)

Return whether the insn expects newly produced value.

void setInnerLoop(MCInst &MCI)

unsigned short getNewValueOp(MCInstrInfo const &MCII, MCInst const &MCI)

bool isHVX(MCInstrInfo const &MCII, MCInst const &MCI)

bool isMemReorderDisabled(MCInst const &MCI)

unsigned short getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI)

bool isCompound(MCInstrInfo const &MCII, MCInst const &MCI)

bool IsVecRegPair(MCRegister VecReg)

constexpr size_t splitNoMemOrderOffset

Definition HexagonMCInstrInfo.h:78

bool mustNotExtend(MCExpr const &Expr)

bool isNewValueStore(MCInstrInfo const &MCII, MCInst const &MCI)

Return true if the operand is a new-value store insn.

MCInstrDesc const & getDesc(MCInstrInfo const &MCII, MCInst const &MCI)

iterator_range< Hexagon::PacketIterator > bundleInstructions(MCInstrInfo const &MCII, MCInst const &MCI)

bool IsVecRegSingle(MCRegister VecReg)

bool LoopNeedsPadding(MCInst const &MCB)

void tryCompound(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCContext &Context, MCInst &MCI)

tryCompound - Given a bundle check for compound insns when one is found update the contents of the bu...

constexpr size_t memReorderDisabledOffset

Definition HexagonMCInstrInfo.h:75

void setMemReorderDisabled(MCInst &MCI)

constexpr size_t noShuffleOffset

Definition HexagonMCInstrInfo.h:81

bool isBundle(MCInst const &MCI)

int64_t minConstant(MCInst const &MCI, size_t Index)

bool isCofRelax1(MCInstrInfo const &MCII, MCInst const &MCI)

bool isDblRegForSubInst(MCRegister Reg)

MCExpr const & getExpr(MCExpr const &Expr)

bool isOpExtendable(MCInstrInfo const &MCII, MCInst const &MCI, unsigned short)

Return whether the operand is extendable.

int getMinValue(MCInstrInfo const &MCII, MCInst const &MCI)

Return the minimum value of an extendable operand.

bool prefersSlot3(MCInstrInfo const &MCII, MCInst const &MCI)

bool hasDuplex(MCInstrInfo const &MCII, MCInst const &MCI)

bool isExtendable(MCInstrInfo const &MCII, MCInst const &MCI)

bool isDuplexPair(MCInst const &MIa, MCInst const &MIb)

Symmetrical. See if these two instructions are fit for duplex pair.

bool isIntRegForSubInst(MCRegister Reg)

constexpr int64_t noShuffleMask

Definition HexagonMCInstrInfo.h:82

unsigned getUnits(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI)

Return the slots used by the insn.

MCInst const * extenderForIndex(MCInst const &MCB, size_t Index)

unsigned getType(MCInstrInfo const &MCII, MCInst const &MCI)

Return the Hexagon ISA class for the insn.

bool isImmext(MCInst const &MCI)

void addConstExtender(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, MCInst const &MCI)

MCOperand const & getNewValueOperand(MCInstrInfo const &MCII, MCInst const &MCI)

bool isPredRegister(MCInstrInfo const &MCII, MCInst const &Inst, unsigned I)

bool isPredicated(MCInstrInfo const &MCII, MCInst const &MCI)

constexpr int64_t innerLoopMask

Definition HexagonMCInstrInfo.h:68

bool isCofMax1(MCInstrInfo const &MCII, MCInst const &MCI)

unsigned SubregisterBit(MCRegister Consumer, MCRegister Producer, MCRegister Producer2)

constexpr int64_t splitNoMemorderMask

Definition HexagonMCInstrInfo.h:79

constexpr size_t bundleInstructionsOffset

Definition HexagonMCInstrInfo.h:84

bool s27_2_reloc(MCExpr const &Expr)

bool hasImmExt(MCInst const &MCI)

bool isInnerLoop(MCInst const &MCI)

bool hasNewValue2(MCInstrInfo const &MCII, MCInst const &MCI)

Return whether the insn produces a second value.

PredicateInfo predicateInfo(MCInstrInfo const &MCII, MCInst const &MCI)

constexpr size_t innerLoopOffset

Definition HexagonMCInstrInfo.h:67

bool canonicalizePacket(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCContext &Context, MCInst &MCB, HexagonMCChecker *Checker, bool AttemptCompatibility=false)

unsigned getOtherReservedSlots(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI)

Return the slots this instruction consumes in addition to the slot(s) it can execute out of.

bool isCanon(MCInstrInfo const &MCII, MCInst const &MCI)

constexpr size_t outerLoopOffset

Definition HexagonMCInstrInfo.h:70

unsigned slotsConsumed(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI)

int getMaxValue(MCInstrInfo const &MCII, MCInst const &MCI)

Return the maximum value of an extendable operand.

void replaceDuplex(MCContext &Context, MCInst &MCI, DuplexCandidate Candidate)

void setMustNotExtend(MCExpr const &Expr, bool Val=true)

bool requiresSlot(MCSubtargetInfo const &STI, MCInst const &MCI)

unsigned getExtentAlignment(MCInstrInfo const &MCII, MCInst const &MCI)

void extendIfNeeded(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, MCInst const &MCI)

bool hasTmpDst(MCInstrInfo const &MCII, MCInst const &MCI)

StringRef getName(MCInstrInfo const &MCII, MCInst const &MCI)

unsigned packetSizeSlots(MCSubtargetInfo const &STI)

bool isPredReg(MCRegisterInfo const &MRI, MCRegister Reg)

bool isPredicatedTrue(MCInstrInfo const &MCII, MCInst const &MCI)

bool hasExtenderForIndex(MCInst const &MCB, size_t Index)

bool isRestrictNoSlot1Store(MCInstrInfo const &MCII, MCInst const &MCI)

constexpr int64_t outerLoopMask

Definition HexagonMCInstrInfo.h:71

MCInst const & instruction(MCInst const &MCB, size_t Index)

bool isAccumulator(MCInstrInfo const &MCII, MCInst const &MCI)

Return where the instruction is an accumulator.

bool mustExtend(MCExpr const &Expr)

bool isVector(MCInstrInfo const &MCII, MCInst const &MCI)

unsigned getDuplexCandidateGroup(MCInst const &MI)

MCOperand const & getExtendableOperand(MCInstrInfo const &MCII, MCInst const &MCI)

bool isSubInstruction(MCInst const &MCI)

MCOperand const & getNewValueOperand2(MCInstrInfo const &MCII, MCInst const &MCI)

void setMustExtend(MCExpr const &Expr, bool Val=true)

unsigned getDuplexRegisterNumbering(MCRegister Reg)

bool isExtended(MCInstrInfo const &MCII, MCInst const &MCI)

bool isCVINew(MCInstrInfo const &MCII, MCInst const &MCI)

bool isFloat(MCInstrInfo const &MCII, MCInst const &MCI)

Return whether it is a floating-point insn.

unsigned iClassOfDuplexPair(unsigned Ga, unsigned Gb)

bool hasNewValue(MCInstrInfo const &MCII, MCInst const &MCI)

Return whether the insn produces a value.

unsigned packetSize(StringRef CPU)

bool isCofRelax2(MCInstrInfo const &MCII, MCInst const &MCI)

MCInst deriveExtender(MCInstrInfo const &MCII, MCInst const &Inst, MCOperand const &MO)

This is an optimization pass for GlobalISel generic memory operations.

constexpr bool isUInt(uint64_t x)

Checks if an unsigned integer fits into the given bit width.

constexpr bool isShiftedInt(int64_t x)

Checks if a signed integer is an N bit number shifted left by S.

constexpr bool isShiftedUInt(uint64_t x)

Checks if a unsigned integer is an N bit number shifted left by S.