#include "HexagonGenRegisterInfo.inc" #include "HexagonGenInstrInfo.inc" #include "HexagonGenSubtargetInfo.inc"">

LLVM: lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h File Reference (original) (raw)

#include "[llvm/MC/MCRegisterInfo.h](MCRegisterInfo%5F8h%5Fsource.html)"
#include "[llvm/Support/CommandLine.h](CommandLine%5F8h%5Fsource.html)"
#include <cstdint>
#include "HexagonGenRegisterInfo.inc"
#include "HexagonGenInstrInfo.inc"
#include "HexagonGenSubtargetInfo.inc"

Go to the source code of this file.

Namespaces
namespace llvm
This is an optimization pass for GlobalISel generic memory operations.
namespace llvm::Hexagon_MC
Macros
#define Hexagon_POINTER_SIZE 4
#define Hexagon_PointerSize (Hexagon_POINTER_SIZE)
#define Hexagon_PointerSize_Bits (Hexagon_POINTER_SIZE * 8)
#define Hexagon_WordSize Hexagon_PointerSize
#define Hexagon_WordSize_Bits Hexagon_PointerSize_Bits
#define HEXAGON_LRFP_SIZE 8
#define HEXAGON_INSTR_SIZE 4
#define HEXAGON_PACKET_SIZE 4
#define HEXAGON_MAX_PACKET_SIZE (HEXAGON_PACKET_SIZE * HEXAGON_INSTR_SIZE)
#define HEXAGON_PACKET_INNER_SIZE 2
#define HEXAGON_PACKET_OUTER_SIZE 3
#define HEXAGON_PRESHUFFLE_PACKET_SIZE (HEXAGON_PACKET_SIZE + 3)
#define HEXAGON_GOT_SYM_NAME "_GLOBAL_OFFSET_TABLE_"
#define GET_REGINFO_ENUM
#define GET_INSTRINFO_ENUM
#define GET_INSTRINFO_SCHED_ENUM
#define GET_INSTRINFO_MC_HELPER_DECLS
#define GET_SUBTARGETINFO_ENUM
Functions
MCInstrInfo * llvm::createHexagonMCInstrInfo ()
MCRegisterInfo * llvm::createHexagonMCRegisterInfo (StringRef TT)
StringRef llvm::Hexagon_MC::selectHexagonCPU (StringRef CPU)
FeatureBitset llvm::Hexagon_MC::completeHVXFeatures (const FeatureBitset &FB)
MCSubtargetInfo * llvm::Hexagon_MC::createHexagonMCSubtargetInfo (const Triple &TT, StringRef CPU, StringRef FS)
Create a Hexagon MCSubtargetInfo instance.
MCSubtargetInfo const * llvm::Hexagon_MC::getArchSubtarget (MCSubtargetInfo const *STI)
void llvm::Hexagon_MC::addArchSubtarget (MCSubtargetInfo const *STI, StringRef FS)
unsigned llvm::Hexagon_MC::GetELFFlags (const MCSubtargetInfo &STI)
llvm::ArrayRef< MCPhysReg > llvm::Hexagon_MC::GetVectRegRev ()
std::optional< unsigned > llvm::Hexagon_MC::getHVXVersion (const FeatureBitset &Features)
unsigned llvm::Hexagon_MC::getArchVersion (const FeatureBitset &Features)
MCCodeEmitter * llvm::createHexagonMCCodeEmitter (const MCInstrInfo &MCII, MCContext &MCT)
MCAsmBackend * llvm::createHexagonAsmBackend (const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
std::unique_ptr< MCObjectTargetWriter > llvm::createHexagonELFObjectWriter (uint8_t OSABI, StringRef CPU)
unsigned llvm::HexagonGetLastSlot ()
unsigned llvm::HexagonConvertUnits (unsigned ItinUnits, unsigned *Lanes)

GET_INSTRINFO_ENUM

#define GET_INSTRINFO_ENUM

GET_INSTRINFO_MC_HELPER_DECLS

#define GET_INSTRINFO_MC_HELPER_DECLS

GET_INSTRINFO_SCHED_ENUM

#define GET_INSTRINFO_SCHED_ENUM

GET_REGINFO_ENUM

GET_SUBTARGETINFO_ENUM

#define GET_SUBTARGETINFO_ENUM

HEXAGON_GOT_SYM_NAME

#define HEXAGON_GOT_SYM_NAME "_GLOBAL_OFFSET_TABLE_"

HEXAGON_INSTR_SIZE

#define HEXAGON_INSTR_SIZE 4

HEXAGON_LRFP_SIZE

#define HEXAGON_LRFP_SIZE 8

HEXAGON_MAX_PACKET_SIZE

#define HEXAGON_MAX_PACKET_SIZE (HEXAGON_PACKET_SIZE * HEXAGON_INSTR_SIZE)

HEXAGON_PACKET_INNER_SIZE

#define HEXAGON_PACKET_INNER_SIZE 2

HEXAGON_PACKET_OUTER_SIZE

#define HEXAGON_PACKET_OUTER_SIZE 3

HEXAGON_PACKET_SIZE

#define HEXAGON_PACKET_SIZE 4

Hexagon_POINTER_SIZE

#define Hexagon_POINTER_SIZE 4

Hexagon_PointerSize

#define Hexagon_PointerSize (Hexagon_POINTER_SIZE)

Hexagon_PointerSize_Bits

#define Hexagon_PointerSize_Bits (Hexagon_POINTER_SIZE * 8)

HEXAGON_PRESHUFFLE_PACKET_SIZE

#define HEXAGON_PRESHUFFLE_PACKET_SIZE (HEXAGON_PACKET_SIZE + 3)

Hexagon_WordSize

#define Hexagon_WordSize Hexagon_PointerSize

Hexagon_WordSize_Bits

#define Hexagon_WordSize_Bits Hexagon_PointerSize_Bits