LLVM: lib/Target/Hexagon/HexagonVExtract.cpp Source File (original) (raw)

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26#include

27

28using namespace llvm;

29

32 cl::desc("Threshold for triggering vextract replacement"));

33

34namespace {

36 public:

37 static char ID;

39

40 StringRef getPassName() const override {

41 return "Hexagon optimize vextract";

42 }

43 void getAnalysisUsage(AnalysisUsage &AU) const override {

45 }

46 bool runOnMachineFunction(MachineFunction &MF) override;

47

48 private:

49 const HexagonSubtarget *HST = nullptr;

50 const HexagonInstrInfo *HII = nullptr;

51

52 unsigned genElemLoad(MachineInstr *ExtI, unsigned BaseR,

53 MachineRegisterInfo &MRI);

54 };

55

56 char HexagonVExtract::ID = 0;

57}

58

60 "Hexagon optimize vextract", false, false)

61

66 Register ElemR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);

67

69 unsigned ExtIdxS = ExtI->getOperand(2).getSubReg();

70

71

72 if (ExtIdxS == 0) {

74 if (DI->getOpcode() == Hexagon::A2_tfrsi) {

76 V &= (HST->getVectorLength()-1) & -4u;

77

78 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::L2_loadri_io), ElemR)

81 return ElemR;

82 }

83 }

84

85 Register IdxR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);

86 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::A2_andir), IdxR)

87 .add(ExtI->getOperand(2))

89 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::L4_loadri_rr), ElemR)

93 return ElemR;

94}

95

96bool HexagonVExtract::runOnMachineFunction(MachineFunction &MF) {

103 MF.getInfo()->getStackAlignBaseReg();

104 std::map<unsigned, SmallVector<MachineInstr *, 4>> VExtractMap;

106

107 for (MachineBasicBlock &MBB : MF) {

108 for (MachineInstr &MI : MBB) {

109 unsigned Opc = MI.getOpcode();

110 if (Opc != Hexagon::V6_extractw)

111 continue;

112 Register VecR = MI.getOperand(1).getReg();

113 VExtractMap[VecR].push_back(&MI);

114 }

115 }

116

119 Register AddrR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);

120 unsigned FiOpc = AR != 0 ? Hexagon::PS_fia : Hexagon::PS_fi;

121 auto MIB = BuildMI(BB, At, dl, HII->get(FiOpc), AddrR);

122 if (AR)

123 MIB.addReg(AR);

124 MIB.addFrameIndex(FI).addImm(Offset);

125 return AddrR;

126 };

127

128 MaybeAlign MaxAlign;

129 for (auto &P : VExtractMap) {

130 unsigned VecR = P.first;

132 continue;

133

134 const auto &VecRC = *MRI.getRegClass(VecR);

135 Align Alignment = HRI.getSpillAlign(VecRC);

136 MaxAlign = std::max(MaxAlign.valueOrOne(), Alignment);

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141 int FI = MFI.CreateStackObject(HRI.getSpillSize(VecRC), Alignment,

142 false);

143

144 MachineInstr *DefI = MRI.getVRegDef(VecR);

146 MachineBasicBlock &DefB = *DefI->getParent();

147 unsigned StoreOpc = VecRC.getID() == Hexagon::HvxVRRegClassID

148 ? Hexagon::V6_vS32b_ai

149 : Hexagon::PS_vstorerw_ai;

155

156 unsigned VecSize = HRI.getRegSizeInBits(VecRC) / 8;

157

158 for (MachineInstr *ExtI : P.second) {

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163 MachineBasicBlock &ExtB = *ExtI->getParent();

165 SR == 0 ? 0 : VecSize/2);

166

167 unsigned ElemR = genElemLoad(ExtI, BaseR, MRI);

169 MRI.replaceRegWith(ExtR, ElemR);

170 ExtB.erase(ExtI);

172 }

173 }

174

175 if (AR && MaxAlign) {

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177 MachineInstr *AlignaI = MRI.getVRegDef(AR);

180 if (*MaxAlign > Op.getImm())

181 Op.setImm(MaxAlign->value());

182 }

183

185}

186

188 return new HexagonVExtract();

189}

unsigned const MachineRegisterInfo * MRI

assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

Promote Memory to Register

static MCRegister getReg(const MCDisassembler *D, unsigned RC, unsigned RegNo)

#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)

This file defines the SmallVector class.

FunctionPass class - This class is used to implement most global optimizations.

const HexagonInstrInfo * getInstrInfo() const override

const HexagonRegisterInfo * getRegisterInfo() const override

const MachineFunction * getParent() const

Return the MachineFunction containing this basic block.

LLVM_ABI instr_iterator erase(instr_iterator I)

Remove an instruction from the instruction list and delete it.

MachineInstrBundleIterator< MachineInstr > iterator

LLVM_ABI int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)

Create a new statically sized stack object, returning a nonnegative identifier to represent it.

MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...

void getAnalysisUsage(AnalysisUsage &AU) const override

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

MachineFrameInfo & getFrameInfo()

getFrameInfo - Return the frame info object for the current function.

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

Ty * getInfo()

getInfo - Keep track of various per-function pieces of information for backends that would like to do...

const MachineInstrBuilder & addImm(int64_t Val) const

Add a new immediate operand.

const MachineInstrBuilder & add(const MachineOperand &MO) const

const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const

Add a new virtual register operand.

Representation of each machine instruction.

unsigned getOpcode() const

Returns the opcode of this MachineInstr.

const MachineBasicBlock * getParent() const

const DebugLoc & getDebugLoc() const

Returns the debug location id of this MachineInstr.

const MachineOperand & getOperand(unsigned i) const

unsigned getSubReg() const

Register getReg() const

getReg - Returns the register number.

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

Wrapper class representing virtual and physical registers.

self_iterator getIterator()

constexpr char Align[]

Key for Kernel::Arg::Metadata::mAlign.

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

initializer< Ty > init(const Ty &Val)

This is an optimization pass for GlobalISel generic memory operations.

MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)

Builder interface. Specify how to create the initial instruction itself.

FunctionPass * createHexagonVExtract()

Definition HexagonVExtract.cpp:187

DWARFExpression::Operation Op

Align valueOrOne() const

For convenience, returns a valid alignment or 1 if undefined.