LLVM: lib/Target/Hexagon/HexagonVectorPrint.cpp Source File (original) (raw)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
33#include
34#include
35
36using namespace llvm;
37
38#define DEBUG_TYPE "hexagon-vector-print"
39
42 cl::desc("Enables tracing of vector stores"));
43
44namespace {
45
50
51public:
52 static char ID;
53
55
56 StringRef getPassName() const override { return "Hexagon VectorPrint pass"; }
57
58 bool runOnMachineFunction(MachineFunction &Fn) override;
59};
60
61}
62
63char HexagonVectorPrint::ID = 0;
64
66 return (Reg >= Hexagon::V0 && Reg <= Hexagon::V31) ||
67 (Reg >= Hexagon::W0 && Reg <= Hexagon::W15) ||
68 (Reg >= Hexagon::WR0 && Reg <= Hexagon::WR15) ||
69 (Reg >= Hexagon::Q0 && Reg <= Hexagon::Q3);
70}
71
73 if (R >= Hexagon::V0 && R <= Hexagon::V31) {
74 static const char* S[] = { "20", "21", "22", "23", "24", "25", "26", "27",
75 "28", "29", "2a", "2b", "2c", "2d", "2e", "2f",
76 "30", "31", "32", "33", "34", "35", "36", "37",
77 "38", "39", "3a", "3b", "3c", "3d", "3e", "3f"};
78 return S[R-Hexagon::V0];
79 }
80 if (R >= Hexagon::Q0 && R <= Hexagon::Q3) {
81 static const char* S[] = { "00", "01", "02", "03"};
82 return S[R-Hexagon::Q0];
83
84 }
86}
87
99
101 if (MI.getNumOperands() < 1) return false;
102
103 if (MI.getOperand(0).isReg() && MI.getOperand(0).isDef()) {
104 Reg = MI.getOperand(0).getReg();
107 }
108
109 if (MI.mayStore() && MI.getNumOperands() >= 3 && MI.getOperand(2).isReg()) {
110 Reg = MI.getOperand(2).getReg();
112 return true;
113 }
114
115 if (MI.mayStore() && MI.getNumOperands() >= 4 && MI.getOperand(3).isReg()) {
116 Reg = MI.getOperand(3).getReg();
118 return true;
119 }
120 return false;
121}
122
123bool HexagonVectorPrint::runOnMachineFunction(MachineFunction &Fn) {
128 std::vector<MachineInstr *> VecPrintList;
129 for (auto &MBB : Fn)
131 if (MI.isBundle()) {
133 for (++MII; MII != MBB.instr_end() && MII->isInsideBundle(); ++MII) {
134 if (MII->getNumOperands() < 1)
135 continue;
136 unsigned Reg = 0;
138 VecPrintList.push_back((&*MII));
139 LLVM_DEBUG(dbgs() << "Found vector reg inside bundle \n";
140 MII->dump());
141 }
142 }
143 } else {
144 unsigned Reg = 0;
146 VecPrintList.push_back(&MI);
148 }
149 }
150 }
151
152 Changed = !VecPrintList.empty();
155
156 for (auto *I : VecPrintList) {
160 unsigned Reg = 0;
164 if (I->isInsideBundle()) {
165 LLVM_DEBUG(dbgs() << "add to end of bundle\n"; I->dump());
166 while (MBB->instr_end() != MII && MII->isInsideBundle())
167 MII++;
168 } else {
169 LLVM_DEBUG(dbgs() << "add after instruction\n"; I->dump());
170 MII++;
171 }
173 continue;
174
175 if (Reg >= Hexagon::V0 && Reg <= Hexagon::V31) {
176 LLVM_DEBUG(dbgs() << "adding dump for V" << Reg - Hexagon::V0 << '\n');
178 } else if (Reg >= Hexagon::W0 && Reg <= Hexagon::W15) {
179 LLVM_DEBUG(dbgs() << "adding dump for W" << Reg - Hexagon::W0 << '\n');
181 MII, DL, QII, Fn);
183 MII, DL, QII, Fn);
184 } else if (Reg >= Hexagon::Q0 && Reg <= Hexagon::Q3) {
185 LLVM_DEBUG(dbgs() << "adding dump for Q" << Reg - Hexagon::Q0 << '\n');
187 } else
189 }
191}
192
193
194
195
197 "Hexagon VectorPrint pass", false, false)
198
200 return new HexagonVectorPrint();
201}
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static cl::opt< bool > TraceHexVectorStoresOnly("trace-hex-vector-stores-only", cl::Hidden, cl::desc("Enables tracing of vector stores"))
static std::string getStringReg(unsigned R)
Definition HexagonVectorPrint.cpp:72
static bool isVecReg(unsigned Reg)
Definition HexagonVectorPrint.cpp:65
static void addAsmInstr(MachineBasicBlock *MBB, unsigned Reg, MachineBasicBlock::instr_iterator I, const DebugLoc &DL, const HexagonInstrInfo *QII, MachineFunction &Fn)
Definition HexagonVectorPrint.cpp:88
static bool getInstrVecReg(const MachineInstr &MI, unsigned &Reg)
Definition HexagonVectorPrint.cpp:100
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
FunctionPass class - This class is used to implement most global optimizations.
const HexagonInstrInfo * getInstrInfo() const override
const HexagonRegisterInfo * getRegisterInfo() const override
Instructions::iterator instr_iterator
instr_iterator instr_end()
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
const char * createExternalSymbolName(StringRef Name)
Allocate a string and populate it with the given external symbol name.
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned TargetFlags=0) const
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
Representation of each machine instruction.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
This is an optimization pass for GlobalISel generic memory operations.
FunctionPass * createHexagonVectorPrint()
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.