LLVM: include/llvm/CodeGen/ISDOpcodes.h Source File (original) (raw)
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13#ifndef LLVM_CODEGEN_ISDOPCODES_H
14#define LLVM_CODEGEN_ISDOPCODES_H
15
18
19namespace llvm {
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963 SET_ROUNDING,
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966 FP_EXTEND,
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981 BITCAST,
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985 ADDRSPACECAST,
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991 FP16_TO_FP,
992 FP_TO_FP16,
993 STRICT_FP16_TO_FP,
994 STRICT_FP_TO_FP16,
995
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1000 BF16_TO_FP,
1001 FP_TO_BF16,
1002 STRICT_BF16_TO_FP,
1003 STRICT_FP_TO_BF16,
1004
1005
1006
1007
1008 FNEG,
1009 FABS,
1010 FSQRT,
1011 FCBRT,
1012 FSIN,
1013 FCOS,
1014 FTAN,
1015 FASIN,
1016 FACOS,
1017 FATAN,
1018 FSINH,
1019 FCOSH,
1020 FTANH,
1021 FPOW,
1022 FPOWI,
1023
1024 FLDEXP,
1025
1026 FATAN2,
1027
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1031 FFREXP,
1032
1033 FLOG,
1034 FLOG2,
1035 FLOG10,
1036 FEXP,
1037 FEXP2,
1038 FEXP10,
1039 FCEIL,
1040 FTRUNC,
1041 FRINT,
1042 FNEARBYINT,
1043 FROUND,
1044 FROUNDEVEN,
1045 FFLOOR,
1046 LROUND,
1047 LLROUND,
1048 LRINT,
1049 LLRINT,
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1065 FMINNUM,
1066 FMAXNUM,
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1081 FMINNUM_IEEE,
1082 FMAXNUM_IEEE,
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1087 FMINIMUM,
1088 FMAXIMUM,
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1092 FMINIMUMNUM,
1093 FMAXIMUMNUM,
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1096 FSINCOS,
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1100 FSINCOSPI,
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1104 FMODF,
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1109 GET_FPENV,
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1114 SET_FPENV,
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1118 RESET_FPENV,
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1123 GET_FPENV_MEM,
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1128 SET_FPENV_MEM,
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1132 GET_FPMODE,
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1137 SET_FPMODE,
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1141 RESET_FPMODE,
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1147 LOAD,
1148 STORE,
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1157 DYNAMIC_STACKALLOC,
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1163 BR,
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1168 BRIND,
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1172 BR_JT,
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1176 JUMP_TABLE_DEBUG_INFO,
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1186 BRCOND,
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1210 INLINEASM,
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1213 INLINEASM_BR,
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1218 EH_LABEL,
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1224 ANNOTATION_LABEL,
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1229 CATCHRET,
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1233 CLEANUPRET,
1234
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1238 STACKSAVE,
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1242 STACKRESTORE,
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1256 CALLSEQ_START,
1257 CALLSEQ_END,
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1262 VAARG,
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1267 VACOPY,
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1271 VAEND,
1272 VASTART,
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1276 PREALLOCATED_SETUP,
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1279 PREALLOCATED_ARG,
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1283 SRCVALUE,
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1287 MDNODE_SDNODE,
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1298 READCYCLECOUNTER,
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1315 INIT_TRAMPOLINE,
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1321 ADJUST_TRAMPOLINE,
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1331 UBSANTRAP,
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1341 ARITH_FENCE,
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1344 MEMBARRIER,
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1349 ATOMIC_FENCE,
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1364 ATOMIC_CMP_SWAP,
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1370 ATOMIC_CMP_SWAP_WITH_SUCCESS,
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1378 ATOMIC_SWAP,
1379 ATOMIC_LOAD_ADD,
1380 ATOMIC_LOAD_SUB,
1381 ATOMIC_LOAD_AND,
1382 ATOMIC_LOAD_CLR,
1383 ATOMIC_LOAD_OR,
1384 ATOMIC_LOAD_XOR,
1385 ATOMIC_LOAD_NAND,
1386 ATOMIC_LOAD_MIN,
1387 ATOMIC_LOAD_MAX,
1388 ATOMIC_LOAD_UMIN,
1389 ATOMIC_LOAD_UMAX,
1390 ATOMIC_LOAD_FADD,
1391 ATOMIC_LOAD_FSUB,
1392 ATOMIC_LOAD_FMAX,
1393 ATOMIC_LOAD_FMIN,
1394 ATOMIC_LOAD_FMAXIMUM,
1395 ATOMIC_LOAD_FMINIMUM,
1396 ATOMIC_LOAD_UINC_WRAP,
1397 ATOMIC_LOAD_UDEC_WRAP,
1398 ATOMIC_LOAD_USUB_COND,
1399 ATOMIC_LOAD_USUB_SAT,
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1407 MLOAD,
1408 MSTORE,
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1419 MGATHER,
1420 MSCATTER,
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1425 LIFETIME_END,
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1438 GC_TRANSITION_START,
1439 GC_TRANSITION_END,
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1445 GET_DYNAMIC_AREA_OFFSET,
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1449 PSEUDO_PROBE,
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1454 VSCALE,
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1464 VECREDUCE_SEQ_FADD,
1465 VECREDUCE_SEQ_FMUL,
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1479 VECREDUCE_FADD,
1480 VECREDUCE_FMUL,
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1482 VECREDUCE_FMAX,
1483 VECREDUCE_FMIN,
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1486 VECREDUCE_FMAXIMUM,
1487 VECREDUCE_FMINIMUM,
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1491 VECREDUCE_ADD,
1492 VECREDUCE_MUL,
1493 VECREDUCE_AND,
1494 VECREDUCE_OR,
1495 VECREDUCE_XOR,
1496 VECREDUCE_SMAX,
1497 VECREDUCE_SMIN,
1498 VECREDUCE_UMAX,
1499 VECREDUCE_UMIN,
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1516 PARTIAL_REDUCE_SMLA,
1517 PARTIAL_REDUCE_UMLA,
1518 PARTIAL_REDUCE_SUMLA,
1519 PARTIAL_REDUCE_FMLA,
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1521
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1524 STACKMAP,
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1530 PATCHPOINT,
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1535 PTRADD,
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1538#define BEGIN_REGISTER_VP_SDNODE(VPSDID, ...) VPSDID,
1539#include "llvm/IR/VPIntrinsics.def"
1540
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1542 RELOC_NONE,
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1544
1545 CONVERGENCECTRL_ANCHOR,
1546 CONVERGENCECTRL_ENTRY,
1547 CONVERGENCECTRL_LOOP,
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1551 CONVERGENCECTRL_GLUE,
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1556 EXPERIMENTAL_VECTOR_HISTOGRAM,
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1560 VECTOR_FIND_LAST_ACTIVE,
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1569 GET_ACTIVE_LANE_MASK,
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1589};
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1621 bool hasFPExcept);
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1734};
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1769 return ((int)Cond >> 3) & 3;
1770}
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1795}
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1811}
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1813}
1814
1815#endif
PowerPC Reduce CR logical Operation
const SmallVectorImpl< MachineOperand > & Cond
#define ATOMIC_STORE(x, y)
The instances of the Type class are immutable: once they are created, they are never changed.
Definition ISDOpcodes.h:1787
LLVM_ABI CondCode getSetCCInverse(CondCode Operation, bool isIntegerLike)
Return the operation corresponding to !(X op Y), where 'op' is a valid SetCC operation.
ISD namespace - This namespace contains an enum which represents all of the SelectionDAG node types a...
Definition ISDOpcodes.h:24
LLVM_ABI CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, EVT Type)
Return the result of a logical AND between different comparisons of identical values: ((X op1 Y) & (X...
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
Definition ISDOpcodes.h:41
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition ISDOpcodes.h:807
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition ISDOpcodes.h:256
@ CTLZ_ZERO_UNDEF
Definition ISDOpcodes.h:780
@ TargetConstantPool
Definition ISDOpcodes.h:184
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
Definition ISDOpcodes.h:504
@ DELETED_NODE
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition ISDOpcodes.h:45
@ STRICT_FSIN
Definition ISDOpcodes.h:435
@ POISON
POISON - A poison node.
Definition ISDOpcodes.h:231
@ LOOP_DEPENDENCE_RAW_MASK
Definition ISDOpcodes.h:1575
@ JumpTable
Definition ISDOpcodes.h:91
@ EH_SJLJ_LONGJMP
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic.
Definition ISDOpcodes.h:163
@ SREM
Definition ISDOpcodes.h:264
@ FGETSIGN
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition ISDOpcodes.h:531
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition ISDOpcodes.h:270
@ SSUBO_CARRY
Definition ISDOpcodes.h:334
@ UDIV
Definition ISDOpcodes.h:263
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
Definition ISDOpcodes.h:593
@ UINT_TO_FP
Definition ISDOpcodes.h:869
@ UMIN
Definition ISDOpcodes.h:726
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:771
@ ROTR
Definition ISDOpcodes.h:766
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:387
@ TargetBlockAddress
Definition ISDOpcodes.h:186
@ ConstantFP
Definition ISDOpcodes.h:87
@ STRICT_FATAN2
Definition ISDOpcodes.h:441
@ DEACTIVATION_SYMBOL
Definition ISDOpcodes.h:1584
@ UADDO
Definition ISDOpcodes.h:344
@ SDIV
Definition ISDOpcodes.h:262
@ STRICT_FCEIL
Definition ISDOpcodes.h:454
@ ADDC
Carry-setting nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:289
@ FRAME_TO_ARGS_OFFSET
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition ISDOpcodes.h:140
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
Definition ISDOpcodes.h:515
@ STRICT_FTANH
Definition ISDOpcodes.h:444
@ ADD
Simple integer binary arithmetic operators.
Definition ISDOpcodes.h:259
@ SMULFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:393
@ STRICT_FMA
Definition ISDOpcodes.h:425
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition ISDOpcodes.h:841
@ FSUB
Definition ISDOpcodes.h:411
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:511
@ UMULFIX
Definition ISDOpcodes.h:388
@ SUBC
Definition ISDOpcodes.h:290
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition ISDOpcodes.h:215
@ RETURNADDR
Definition ISDOpcodes.h:111
@ EH_SJLJ_SETUP_DISPATCH
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
Definition ISDOpcodes.h:167
@ GlobalAddress
Definition ISDOpcodes.h:88
@ STRICT_FMINIMUM
Definition ISDOpcodes.h:464
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition ISDOpcodes.h:868
@ CONCAT_VECTORS
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition ISDOpcodes.h:577
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:410
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:744
@ SIGN_EXTEND_VECTOR_INREG
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition ISDOpcodes.h:898
@ UDIVREM
Definition ISDOpcodes.h:276
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:275
@ SRL
Definition ISDOpcodes.h:764
@ STRICT_FSETCCS
Definition ISDOpcodes.h:505
@ FMULADD
FMULADD - Performs a * b + c, with, or without, intermediate rounding.
Definition ISDOpcodes.h:521
@ STRICT_FLOG2
Definition ISDOpcodes.h:449
@ FPTRUNC_ROUND
FPTRUNC_ROUND - This corresponds to the fptrunc_round intrinsic.
Definition ISDOpcodes.h:508
@ VALUETYPE
Definition ISDOpcodes.h:82
@ STRICT_FDIV
Definition ISDOpcodes.h:423
@ Register
Definition ISDOpcodes.h:84
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition ISDOpcodes.h:249
@ SDIVFIX
RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width...
Definition ISDOpcodes.h:400
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
Definition ISDOpcodes.h:431
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
Definition ISDOpcodes.h:1588
@ UCMP
Definition ISDOpcodes.h:733
@ GlobalTLSAddress
Definition ISDOpcodes.h:89
@ SRA
Definition ISDOpcodes.h:763
@ FrameIndex
Definition ISDOpcodes.h:90
@ STRICT_FMUL
Definition ISDOpcodes.h:422
@ EH_RETURN
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
Definition ISDOpcodes.h:151
@ USUBO
Definition ISDOpcodes.h:348
@ AVGFLOORU
Definition ISDOpcodes.h:708
@ SIGN_EXTEND
Conversion operators.
Definition ISDOpcodes.h:832
@ STRICT_FASIN
Definition ISDOpcodes.h:438
@ AVGCEILS
AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an integer of type i[N+2],...
Definition ISDOpcodes.h:712
@ STRICT_UINT_TO_FP
Definition ISDOpcodes.h:478
@ SCALAR_TO_VECTOR
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition ISDOpcodes.h:662
@ ADDROFRETURNADDR
ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
Definition ISDOpcodes.h:117
@ TargetExternalSymbol
Definition ISDOpcodes.h:185
@ USHLSAT
Definition ISDOpcodes.h:380
@ UDIVFIXSAT
Definition ISDOpcodes.h:407
@ UADDSAT
Definition ISDOpcodes.h:361
@ STRICT_FATAN
Definition ISDOpcodes.h:440
@ CTTZ_ZERO_UNDEF
Bit counting operators with an undefined result for zero inputs.
Definition ISDOpcodes.h:779
@ TargetJumpTable
Definition ISDOpcodes.h:183
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition ISDOpcodes.h:193
@ WRITE_REGISTER
Definition ISDOpcodes.h:135
@ STRICT_FPOW
Definition ISDOpcodes.h:432
@ TRUNCATE_SSAT_U
Definition ISDOpcodes.h:861
@ SETCCCARRY
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition ISDOpcodes.h:815
@ STRICT_LROUND
Definition ISDOpcodes.h:459
@ CTTZ
Definition ISDOpcodes.h:772
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:347
@ FP_TO_UINT
Definition ISDOpcodes.h:915
@ VECTOR_INTERLEAVE
VECTOR_INTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor to...
Definition ISDOpcodes.h:628
@ STEP_VECTOR
STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised of a linear sequence of unsign...
Definition ISDOpcodes.h:688
@ OR
Definition ISDOpcodes.h:737
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:534
@ IS_FPCLASS
Performs a check of floating point class property, defined by IEEE-754.
Definition ISDOpcodes.h:541
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:369
@ UMULO
Definition ISDOpcodes.h:352
@ SRA_PARTS
Definition ISDOpcodes.h:822
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:784
@ UMUL_LOHI
Definition ISDOpcodes.h:271
@ STRICT_FPOWI
Definition ISDOpcodes.h:433
@ UNDEF
UNDEF - An undefined node.
Definition ISDOpcodes.h:228
@ RegisterMask
Definition ISDOpcodes.h:85
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
Definition ISDOpcodes.h:242
@ SPLAT_VECTOR
SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes.
Definition ISDOpcodes.h:669
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition ISDOpcodes.h:69
@ FSHL
Definition ISDOpcodes.h:767
@ BasicBlock
Various leaf nodes.
Definition ISDOpcodes.h:81
@ AVGCEILU
Definition ISDOpcodes.h:713
@ CopyFromReg
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition ISDOpcodes.h:225
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:343
@ FSHR
Definition ISDOpcodes.h:768
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition ISDOpcodes.h:180
@ STRICT_FTRUNC
Definition ISDOpcodes.h:458
@ USUBSAT
Definition ISDOpcodes.h:370
@ GET_ROUNDING
Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest, ties to even 2 Round to ...
Definition ISDOpcodes.h:958
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition ISDOpcodes.h:701
@ SHL
Shift and rotation operations.
Definition ISDOpcodes.h:762
@ AssertNoFPClass
AssertNoFPClass - These nodes record if a register contains a float value that is known to be not som...
Definition ISDOpcodes.h:78
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition ISDOpcodes.h:642
@ PtrAuthGlobalAddress
A ptrauth constant.
Definition ISDOpcodes.h:100
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
Definition ISDOpcodes.h:607
@ STRICT_FMAXIMUM
Definition ISDOpcodes.h:463
@ EntryToken
EntryToken - This is the marker used to indicate the start of a region.
Definition ISDOpcodes.h:48
@ STRICT_FMAXNUM
Definition ISDOpcodes.h:452
@ READ_REGISTER
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition ISDOpcodes.h:134
@ XOR
Definition ISDOpcodes.h:738
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition ISDOpcodes.h:569
@ CopyToReg
CopyToReg - This node has three operands: a chain, a register number to set to this value,...
Definition ISDOpcodes.h:219
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition ISDOpcodes.h:838
@ TargetConstantFP
Definition ISDOpcodes.h:175
@ FP_TO_UINT_SAT
Definition ISDOpcodes.h:934
@ STRICT_FMINNUM
Definition ISDOpcodes.h:453
@ CTPOP
Definition ISDOpcodes.h:774
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition ISDOpcodes.h:799
@ FMUL
Definition ISDOpcodes.h:412
@ STRICT_FSINH
Definition ISDOpcodes.h:442
@ LOCAL_RECOVER
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition ISDOpcodes.h:130
@ SRL_PARTS
Definition ISDOpcodes.h:823
@ SUB
Definition ISDOpcodes.h:260
@ MULHS
Definition ISDOpcodes.h:702
@ SSHLSAT
RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift.
Definition ISDOpcodes.h:379
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:351
@ CONDCODE
Definition ISDOpcodes.h:83
@ PARITY
Definition ISDOpcodes.h:776
@ STRICT_LRINT
Definition ISDOpcodes.h:461
@ TargetFrameIndex
Definition ISDOpcodes.h:182
@ ConstantPool
Definition ISDOpcodes.h:92
@ ANY_EXTEND_VECTOR_INREG
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition ISDOpcodes.h:887
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition ISDOpcodes.h:876
@ UDIVFIX
Definition ISDOpcodes.h:401
@ UMULFIXSAT
Definition ISDOpcodes.h:394
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:724
@ MCSymbol
Definition ISDOpcodes.h:188
@ Constant
Definition ISDOpcodes.h:86
@ STRICT_FREM
Definition ISDOpcodes.h:424
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
Definition ISDOpcodes.h:633
@ SDIVFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:406
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
Definition ISDOpcodes.h:103
@ STRICT_FROUND
Definition ISDOpcodes.h:456
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:793
@ UADDO_CARRY
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:323
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
Definition ISDOpcodes.h:477
@ STRICT_FFLOOR
Definition ISDOpcodes.h:455
@ STRICT_FROUNDEVEN
Definition ISDOpcodes.h:457
@ STRICT_FEXP
Definition ISDOpcodes.h:445
@ EH_DWARF_CFA
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA),...
Definition ISDOpcodes.h:145
@ FDIV
Definition ISDOpcodes.h:413
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
Definition ISDOpcodes.h:110
@ FREM
Definition ISDOpcodes.h:414
@ STRICT_FP_TO_UINT
Definition ISDOpcodes.h:471
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
Definition ISDOpcodes.h:493
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:470
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:914
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition ISDOpcodes.h:174
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition ISDOpcodes.h:498
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition ISDOpcodes.h:736
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition ISDOpcodes.h:200
@ USUBO_CARRY
Definition ISDOpcodes.h:324
@ STRICT_FCOSH
Definition ISDOpcodes.h:443
@ SUBE
Definition ISDOpcodes.h:300
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:732
@ CARRY_FALSE
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition ISDOpcodes.h:280
@ AVGFLOORS
AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of type i[N+1],...
Definition ISDOpcodes.h:707
@ ADDE
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:299
@ STRICT_FADD
Constrained versions of the binary floating point operators.
Definition ISDOpcodes.h:420
@ UREM
Definition ISDOpcodes.h:265
@ STRICT_FLOG10
Definition ISDOpcodes.h:448
@ SPLAT_VECTOR_PARTS
SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the scalar values joined together a...
Definition ISDOpcodes.h:678
@ FREEZE
FREEZE - FREEZE(VAL) returns an arbitrary value if VAL is UNDEF (or is evaluated to UNDEF),...
Definition ISDOpcodes.h:236
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
Definition ISDOpcodes.h:558
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition ISDOpcodes.h:53
@ STRICT_LLRINT
Definition ISDOpcodes.h:462
@ VECTOR_SPLICE
VECTOR_SPLICE(VEC1, VEC2, IMM) - Returns a subvector of the same type as VEC1/VEC2 from CONCAT_VECTOR...
Definition ISDOpcodes.h:654
@ STRICT_FEXP2
Definition ISDOpcodes.h:446
@ STRICT_FSUB
Definition ISDOpcodes.h:421
@ STRICT_FLOG
Definition ISDOpcodes.h:447
@ ExternalSymbol
Definition ISDOpcodes.h:93
@ STRICT_FTAN
Definition ISDOpcodes.h:437
@ MUL
Definition ISDOpcodes.h:261
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
Definition ISDOpcodes.h:947
@ VECTOR_COMPRESS
VECTOR_COMPRESS(Vec, Mask, Passthru) consecutively place vector elements based on mask e....
Definition ISDOpcodes.h:696
@ CTLZ
Definition ISDOpcodes.h:773
@ SPONENTRY
SPONENTRY - Represents the llvm.sponentry intrinsic.
Definition ISDOpcodes.h:122
@ CLEAR_CACHE
Definition ISDOpcodes.h:1580
@ STRICT_FLDEXP
Definition ISDOpcodes.h:434
@ STRICT_LLROUND
Definition ISDOpcodes.h:460
@ ZERO_EXTEND_VECTOR_INREG
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition ISDOpcodes.h:909
@ STRICT_FCOS
Definition ISDOpcodes.h:436
@ STRICT_FNEARBYINT
Definition ISDOpcodes.h:451
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:933
@ EH_SJLJ_SETJMP
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj....
Definition ISDOpcodes.h:157
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition ISDOpcodes.h:844
@ ROTL
Definition ISDOpcodes.h:765
@ BlockAddress
Definition ISDOpcodes.h:94
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
Definition ISDOpcodes.h:821
@ AssertSext
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition ISDOpcodes.h:62
@ BITREVERSE
Definition ISDOpcodes.h:775
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:527
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:360
@ AssertZext
Definition ISDOpcodes.h:63
@ SMAX
Definition ISDOpcodes.h:725
@ STRICT_FRINT
Definition ISDOpcodes.h:450
@ VECTOR_DEINTERLEAVE
VECTOR_DEINTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor ...
Definition ISDOpcodes.h:617
@ UMAX
Definition ISDOpcodes.h:727
@ TRUNCATE_SSAT_S
TRUNCATE_[SU]SAT_[SU] - Truncate for saturated operand [SU] located in middle, prefix for SAT means i...
Definition ISDOpcodes.h:859
@ ABDS
ABDS/ABDU - Absolute difference - Return the absolute difference between two numbers interpreted as s...
Definition ISDOpcodes.h:719
@ TRUNCATE_USAT_U
Definition ISDOpcodes.h:863
@ SADDO_CARRY
Carry-using overflow-aware nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:333
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition ISDOpcodes.h:208
@ STRICT_FACOS
Definition ISDOpcodes.h:439
@ TargetGlobalTLSAddress
Definition ISDOpcodes.h:181
@ ABDU
Definition ISDOpcodes.h:720
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition ISDOpcodes.h:549
@ LOOP_DEPENDENCE_WAR_MASK
Set rounding mode.
Definition ISDOpcodes.h:1574
bool isIndexTypeSigned(MemIndexType IndexType)
Definition ISDOpcodes.h:1671
bool isExtVecInRegOpcode(unsigned Opcode)
Definition ISDOpcodes.h:1781
LLVM_ABI NodeType getExtForLoadExtType(bool IsFP, LoadExtType)
bool isFPEqualitySetCC(CondCode Code)
Return true if this is a setcc instruction that performs an equality comparison when used with floati...
Definition ISDOpcodes.h:1756
bool isExtOpcode(unsigned Opcode)
Definition ISDOpcodes.h:1776
static const int LAST_LOADEXT_TYPE
Definition ISDOpcodes.h:1687
LLVM_ABI bool isVPBinaryOp(unsigned Opcode)
Whether this is a vector-predicated binary operation opcode.
LLVM_ABI CondCode getSetCCInverse(CondCode Operation, EVT Type)
Return the operation corresponding to !(X op Y), where 'op' is a valid SetCC operation.
LLVM_ABI std::optional< unsigned > getBaseOpcodeForVP(unsigned Opcode, bool hasFPExcept)
Translate this VP Opcode to its corresponding non-VP Opcode.
bool isBitwiseLogicOp(unsigned Opcode)
Whether this is bitwise logic opcode.
Definition ISDOpcodes.h:1592
bool isTrueWhenEqual(CondCode Cond)
Return true if the specified condition returns true if the two operands to the condition are equal.
Definition ISDOpcodes.h:1763
LLVM_ABI std::optional< unsigned > getVPMaskIdx(unsigned Opcode)
The operand position of the vector mask.
static const int LAST_MEM_INDEX_TYPE
Definition ISDOpcodes.h:1669
unsigned getUnorderedFlavor(CondCode Cond)
This function returns 0 if the condition is always false if an operand is a NaN, 1 if the condition i...
Definition ISDOpcodes.h:1768
LLVM_ABI std::optional< unsigned > getVPExplicitVectorLengthIdx(unsigned Opcode)
The operand position of the explicit vector length parameter.
LLVM_ABI CondCode getSetCCSwappedOperands(CondCode Operation)
Return the operation corresponding to (Y op X) when given the operation for (X op Y).
LLVM_ABI std::optional< unsigned > getVPForBaseOpcode(unsigned Opcode)
Translate this non-VP Opcode to its corresponding VP Opcode.
MemIndexType
MemIndexType enum - This enum defines how to interpret MGATHER/SCATTER's index parameter when calcula...
Definition ISDOpcodes.h:1667
@ SIGNED_SCALED
Definition ISDOpcodes.h:1667
@ UNSIGNED_SCALED
Definition ISDOpcodes.h:1667
bool isSignedIntSetCC(CondCode Code)
Return true if this is a setcc instruction that performs a signed comparison when used with integer o...
Definition ISDOpcodes.h:1738
LLVM_ABI NodeType getInverseMinMaxOpcode(unsigned MinMaxOpc)
Given a MinMaxOpc of ISD::(U|S)MIN or ISD::(U|S)MAX, returns ISD::(U|S)MAX and ISD::(U|S)MIN,...
LLVM_ABI bool isVPReduction(unsigned Opcode)
Whether this is a vector-predicated reduction opcode.
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
Definition ISDOpcodes.h:1654
@ POST_DEC
Definition ISDOpcodes.h:1654
@ PRE_DEC
Definition ISDOpcodes.h:1654
@ POST_INC
Definition ISDOpcodes.h:1654
@ PRE_INC
Definition ISDOpcodes.h:1654
@ UNINDEXED
Definition ISDOpcodes.h:1654
CondCode
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out,...
Definition ISDOpcodes.h:1705
@ SETOEQ
Definition ISDOpcodes.h:1708
@ SETUNE
Definition ISDOpcodes.h:1721
@ SETUEQ
Definition ISDOpcodes.h:1716
@ SETTRUE2
Definition ISDOpcodes.h:1731
@ SETOLE
Definition ISDOpcodes.h:1712
@ SETOLT
Definition ISDOpcodes.h:1711
@ SETNE
Definition ISDOpcodes.h:1730
@ SETUGT
Definition ISDOpcodes.h:1717
@ SETOGT
Definition ISDOpcodes.h:1709
@ SETULT
Definition ISDOpcodes.h:1719
@ SETUO
Definition ISDOpcodes.h:1715
@ SETONE
Definition ISDOpcodes.h:1713
@ SETGT
Definition ISDOpcodes.h:1726
@ SETFALSE2
Definition ISDOpcodes.h:1724
@ SETLT
Definition ISDOpcodes.h:1728
@ SETO
Definition ISDOpcodes.h:1714
@ SETGE
Definition ISDOpcodes.h:1727
@ SETTRUE
Definition ISDOpcodes.h:1722
@ SETUGE
Definition ISDOpcodes.h:1718
@ SETLE
Definition ISDOpcodes.h:1729
@ SETULE
Definition ISDOpcodes.h:1720
@ SETOGE
Definition ISDOpcodes.h:1710
@ SETFALSE
Definition ISDOpcodes.h:1707
@ SETEQ
Definition ISDOpcodes.h:1725
@ SETCC_INVALID
Definition ISDOpcodes.h:1733
LLVM_ABI NodeType getVecReduceBaseOpcode(unsigned VecReduceOpcode)
Get underlying scalar opcode for VECREDUCE opcode.
LoadExtType
LoadExtType enum - This enum defines the three variants of LOADEXT (load with extension).
Definition ISDOpcodes.h:1685
@ NON_EXTLOAD
Definition ISDOpcodes.h:1685
@ SEXTLOAD
Definition ISDOpcodes.h:1685
@ ZEXTLOAD
Definition ISDOpcodes.h:1685
@ EXTLOAD
Definition ISDOpcodes.h:1685
bool isUnsignedIntSetCC(CondCode Code)
Return true if this is a setcc instruction that performs an unsigned comparison when used with intege...
Definition ISDOpcodes.h:1744
static const int LAST_INDEXED_MODE
Definition ISDOpcodes.h:1656
LLVM_ABI bool isVPOpcode(unsigned Opcode)
Whether this is a vector-predicated Opcode.
LLVM_ABI CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, EVT Type)
Return the result of a logical OR between different comparisons of identical values: ((X op1 Y) | (X ...
bool isIntEqualitySetCC(CondCode Code)
Return true if this is a setcc instruction that performs an equality comparison when used with intege...
Definition ISDOpcodes.h:1750
This is an optimization pass for GlobalISel generic memory operations.